公开(公告)号：US20150243520A1

公开(公告)日：2015-08-27

申请号：US14519813

申请日：2014-10-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin PARK ,  Cha-Won KOH ,  Hyun-Woo KIM

IPC: H01L21/311

CPC classification number: H01L21/0273 ,  G03F7/26 ,  G03F7/38 ,  H01L21/02164 ,  H01L21/02277 ,  H01L21/0337 ,  H01L21/31058

Abstract: In a method of forming a pattern of a semiconductor device, a hard mask layer is formed on a substrate. A photoresist film is coated on the hard mask layer. The photoresist film is exposed and developed to form a first photoresist pattern. A smoothing process is performed on the first photoresist pattern to form a second photoresist pattern having a roughness property lower from that of the first photoresist pattern. In the smoothing process, a surface of the first photoresist pattern is treated with an organic solvent. An ALD layer is formed on a surface of the second photoresist pattern. The ALD layer is anisotropically etched to form an ALD layer pattern on a sidewall of the second photoresist pattern. The hard mask layer is etched using the second photoresist pattern and the ALD layer pattern as an etching mask to form a hard mask pattern.

Abstract translation: 在形成半导体器件的图案的方法中，在衬底上形成硬掩模层。 将光致抗蚀剂膜涂覆在硬掩模层上。 光致抗蚀剂膜被曝光和显影以形成第一光致抗蚀剂图案。 在第一光致抗蚀剂图案上进行平滑化处理以形成具有比第一光致抗蚀剂图案低的粗糙度特性的第二光致抗蚀剂图案。 在平滑处理中，用有机溶剂处理第一光致抗蚀剂图案的表面。 在第二光致抗蚀剂图案的表面上形成ALD层。 ALD层被各向异性蚀刻以在第二光致抗蚀剂图案的侧壁上形成ALD层图案。 使用第二光致抗蚀剂图案和ALD层图案作为蚀刻掩模蚀刻硬掩模层以形成硬掩模图案。

公开(公告)号：US20190206872A1

公开(公告)日：2019-07-04

申请号：US16170665

申请日：2018-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-A KIM ,  Yong-Kwan KIM ,  Se-Keun PARK ,  Joo-Young LEE ,  Cha-Won KOH ,  Yeong-Cheol LEE

IPC: H01L27/108

CPC classification number: H01L27/10855 ,  H01L21/28525 ,  H01L21/3065 ,  H01L21/76879 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, word lines, a doped junction, bit line structures, and buried contacts. The substrate has active regions. The word lines extend across the active regions. The doped junction has impurities and is arranged at the active regions, and includes first junctions and second junctions, each first junction arranged at a central portion of one of the active regions and each second junction arranged at an end portion of another one of the active regions, a buried semiconductor layer being included in each second junction. The bit line structures contact with a respective one of the first junctions. The buried contacts are arranged in a matrix shape, each contacting with a respective one of the second junctions and the included buried semiconductor layer and simultaneously contacting with a charge storage for storing data.

公开(公告)号：US20170125257A1

公开(公告)日：2017-05-04

申请号：US15243128

申请日：2016-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cha-Won KOH ,  Cheol-Hong PARK ,  Hyun-Woo KIM ,  Jin-Kyu HAN

IPC: H01L21/308

CPC classification number: H01L21/3088 ,  B81C1/00952 ,  G03F7/40 ,  H01L21/02052 ,  H01L21/0206 ,  H01L21/3085 ,  H01L21/3086

Abstract: Example embodiments relate to a method of forming a photoresist pattern and a method of fabricating a semiconductor device using the same. The method of fabricating a semiconductor device comprises forming a mask layer on a substrate, forming a photoresist pattern on the mask layer, the photoresist pattern having pattern portions at a first height and recess portions, applying a first liquid onto the photoresist pattern, filling the recess portions with a pattern filler at a second height, the pattern filler having an higher etch rate than the etch rate of the pattern portions to the same etchant, removing the first liquid, etching the pattern filler after removing the first liquid, etching the mask layer via the photoresist pattern to form a mask pattern, and etching the substrate via the mask pattern to form a fine pattern.

公开(公告)号：US20160358778A1

公开(公告)日：2016-12-08

申请号：US15047659

申请日：2016-02-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cheol-Hong PARK ,  Sang-Yoon WOO ,  Cha-Won KOH ,  Hyun-Woo KIM ,  Sang-Min PARK

IPC: H01L21/033 ,  H01L27/108 ,  G03F7/20 ,  H01L21/027

CPC classification number: G03F7/20 ,  G03F7/091 ,  G03F7/11 ,  G03F7/32 ,  H01L21/0276 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3081 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76802 ,  H01L27/10876

Abstract: In a method of forming a pattern, a lower coating layer and a photoresist layer are sequentially formed on an object layer. An exposure process may be performed such that the photoresist layer is divided into an exposed portion and a non-exposed portion. A portion of the lower coating layer overlapping or contacting the exposed portion is at least partially transformed into a polarity conversion portion that has a polarity substantially identical to that of the exposed portion. The non-exposed portion of the photoresist layer is selectively removed.

Abstract translation: 在形成图案的方法中，在目标层上依次形成下涂层和光致抗蚀剂层。 可以进行曝光处理，使得光致抗蚀剂层被分成暴露部分和非曝光部分。 与暴露部分重叠或接触的下部涂层的一部分至少部分地转变成具有与暴露部分的极性基本相同的极性的极性转换部分。 选择性地去除光致抗蚀剂层的未曝光部分。