公开(公告)号：US10998301B2

公开(公告)日：2021-05-04

申请号：US16531778

申请日：2019-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kohji Kanamori ,  Hyun Mog Park ,  Yong Seok Kim ,  Kyung Hwan Lee ,  Jun Hee Lim ,  Jee Hoon Han

IPC: H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582

Abstract: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.

公开(公告)号：US12035528B2

公开(公告)日：2024-07-09

申请号：US17394499

申请日：2021-08-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Jun Shin ,  Hyun Mog Park ,  Joong Shik Shin

IPC: H10B43/27 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H10B43/50

CPC classification number: H10B43/27 ,  H01L21/3213 ,  H01L21/76802 ,  H01L21/76877 ,  H01L29/41775 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/7889 ,  H01L29/7926 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H10B43/50

Abstract: A semiconductor device includes gate electrodes stacked along a direction perpendicular to an upper surface of a substrate, the gate electrodes extending to different lengths in a first direction, and each gate electrode including subgate electrodes spaced apart from each other in a second direction perpendicular to the first direction, and gate connection portions connecting subgate electrodes of a same gate electrode of the gate electrodes to each other, channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, and dummy channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, the dummy channels including first dummy channels arranged in rows and columns, and second dummy channels arranged between the first dummy channels in a region including the gate connection portions.

公开(公告)号：US11942463B2

公开(公告)日：2024-03-26

申请号：US18140917

申请日：2023-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Mog Park ,  Sang Youn Jo

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/528 ,  H01L25/00 ,  H10B41/27 ,  H10B41/30 ,  H10B41/40 ,  H10B43/27 ,  H10B43/30 ,  H10B43/40

CPC classification number: H01L25/18 ,  H01L23/528 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/89 ,  H01L25/50 ,  H10B41/27 ,  H10B41/30 ,  H10B41/40 ,  H10B43/27 ,  H10B43/30 ,  H10B43/40 ,  H01L2224/0557 ,  H01L2224/08147 ,  H01L2224/0913 ,  H01L2224/80001

Abstract: A semiconductor device includes a first substrate structure including a first substrate, gate electrodes stacked on the first substrate, and extended by different lengths to provide contact regions, cell contact plugs connected to the gate electrodes in the contact regions, and first bonding pads disposed on the cell contact plugs to be electrically connected to the cell contact plugs, respectively, and a second substrate structure, connected to the first substrate structure on the first substrate structure, and including a second substrate, circuit elements disposed on the second substrate, and a second bonding pad bonded to the first bonding pads, wherein, the contact regions include first regions having a first width and second regions, of which at least a portion overlaps the first bonding pads, and which have a second width greater than the first width, and the second width is greater than a width of the first bonding pad.

公开(公告)号：US10748886B2

公开(公告)日：2020-08-18

申请号：US16414083

申请日：2019-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Mog Park ,  Sang Youn Jo

IPC: H01L25/18 ,  H01L23/528 ,  H01L27/11556 ,  H01L23/00 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582 ,  H01L25/00

Abstract: A semiconductor device includes a first substrate structure including a first substrate, gate electrodes stacked on the first substrate, and extended by different lengths to provide contact regions, cell contact plugs connected to the gate electrodes in the contact regions, and first bonding pads disposed on the cell contact plugs to be electrically connected to the cell contact plugs, respectively, and a second substrate structure, connected to the first substrate structure on the first substrate structure, and including a second substrate, circuit elements disposed on the second substrate, and a second bonding pad bonded to the first bonding pads, wherein, the contact regions include first regions having a first width and second regions, of which at least a portion overlaps the first bonding pads, and which have a second width greater than the first width, and the second width is greater than a width of the first bonding pad.

公开(公告)号：US10734371B2

公开(公告)日：2020-08-04

申请号：US16515291

申请日：2019-07-18

Applicant: SAMSUNG ELECTRONICS CO. LTD.

Inventor： Hyun Mog Park

IPC: H01L25/18 ,  H01L27/11556 ,  H01L25/00 ,  H01L27/11526 ,  H01L27/11573 ,  H01L27/11582 ,  H01L23/00 ,  H01L25/065 ,  H01L21/683

Abstract: A semiconductor device includes a first substrate structure having a first substrate, circuit elements disposed on the first substrate, and first bonding pads disposed on the circuit elements. A second substrate structure is connected to the first substrate structure. The second substrate structure includes a second substrate having first and second surfaces, first and second conductive layers spaced apart from each other, a pad insulating layer having an opening exposing a portion of the second conductive layer and gate electrodes stacked to be spaced apart from each other in a first direction and electrically connected to the circuit elements. First contact plugs extend on the second surface in the first direction and connect to the gate electrodes. A second contact plug extends on the second surface in the first direction and electrically connects to the second conductive layer. Second bonding pads electrically connect to the first and second contact plugs.

公开(公告)号：US11721684B2

公开(公告)日：2023-08-08

申请号：US17245299

申请日：2021-04-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kohji Kanamori ,  Hyun Mog Park ,  Yong Seok Kim ,  Kyung Hwan Lee ,  Jun Hee Lim ,  Jee Hoon Han

IPC: H01L25/18 ,  H01L23/00 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L25/18 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H10B41/27 ,  H10B43/27 ,  H01L2224/022 ,  H01L2224/05025 ,  H01L2224/08145 ,  H01L2224/0903 ,  H01L2224/09181 ,  H01L2924/14511

Abstract: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.

公开(公告)号：US11270987B2

公开(公告)日：2022-03-08

申请号：US16994207

申请日：2020-08-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Mog Park ,  Sang Youn Jo

IPC: H01L27/11521 ,  H01L25/18 ,  H01L23/528 ,  H01L27/11556 ,  H01L23/00 ,  H01L27/11526 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582 ,  H01L25/00

Abstract: A semiconductor device includes a first substrate structure including a first substrate, gate electrodes stacked on the first substrate, and extended by different lengths to provide contact regions, cell contact plugs connected to the gate electrodes in the contact regions, and first bonding pads disposed on the cell contact plugs to be electrically connected to the cell contact plugs, respectively, and a second substrate structure, connected to the first substrate structure on the first substrate structure, and including a second substrate, circuit elements disposed on the second substrate, and a second bonding pad bonded to the first bonding pads, wherein, the contact regions include first regions having a first width and second regions, of which at least a portion overlaps the first bonding pads, and which have a second width greater than the first width, and the second width is greater than a width of the at least one first bonding pad.

公开(公告)号：US11211372B2

公开(公告)日：2021-12-28

申请号：US16939159

申请日：2020-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun Mog Park

IPC: H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L25/00 ,  H01L27/11526 ,  H01L27/11573 ,  H01L27/11582 ,  H01L25/065 ,  H01L21/683

Abstract: A semiconductor device includes a first substrate structure having a first substrate, circuit elements disposed on the first substrate, and first bonding pads disposed on the circuit elements. A second substrate structure is connected to the first substrate structure. The second substrate structure includes a second substrate having first and second surfaces, first and second conductive layers spaced apart from each other, a pad insulating layer having an opening exposing a portion of the second conductive layer and gate electrodes stacked to be spaced apart from each other in a first direction and electrically connected to the circuit elements. First contact plugs extend on the second surface in the first direction and connect to the gate electrodes. A second contact plug extends on the second surface in the first direction and electrically connects to the second conductive layer. Second bonding pads electrically connect to the first and second contact plugs.

公开(公告)号：US10680007B2

公开(公告)日：2020-06-09

申请号：US15933544

申请日：2018-03-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Jun Shin ,  Hyun Mog Park ,  Joong Shik Shin

IPC: H01L27/11582 ,  H01L27/11575 ,  H01L27/11565 ,  H01L27/11526 ,  H01L27/11573 ,  H01L27/11556 ,  H01L29/788 ,  H01L29/792 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L21/768 ,  H01L21/3213 ,  H01L27/1157

Abstract: A semiconductor device includes gate electrodes stacked along a direction perpendicular to an upper surface of a substrate, the gate electrodes extending to different lengths in a first direction, and each gate electrode including subgate electrodes spaced apart from each other in a second direction perpendicular to the first direction, and gate connection portions connecting subgate electrodes of a same gate electrode of the gate electrodes to each other, channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, and dummy channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, the dummy channels including first dummy channels arranged in rows and columns, and second dummy channels arranged between the first dummy channels in a region including the gate connection portions.

公开(公告)号：US11664362B2

公开(公告)日：2023-05-30

申请号：US17687790

申请日：2022-03-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Mog Park ,  Sang Youn Jo

IPC: H01L25/18 ,  H01L23/528 ,  H01L27/11556 ,  H01L23/00 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582 ,  H01L25/00

CPC classification number: H01L25/18 ,  H01L23/528 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/89 ,  H01L25/50 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582 ,  H01L2224/0557 ,  H01L2224/08147 ,  H01L2224/0913 ,  H01L2224/80001

Abstract: A semiconductor device includes a first substrate structure including a first substrate, gate electrodes stacked on the first substrate, and extended by different lengths to provide contact regions, cell contact plugs connected to the gate electrodes in the contact regions, and first bonding pads disposed on the cell contact plugs to be electrically connected to the cell contact plugs, respectively, and a second substrate structure, connected to the first substrate structure on the first substrate structure, and including a second substrate, circuit elements disposed on the second substrate, and a second bonding pad bonded to the first bonding pads, wherein, the contact regions include first regions having a first width and second regions, of which at least a portion overlaps the first bonding pads, and which have a second width greater than the first width, and the second width is greater than a width of the at least one first bonding pad.