公开(公告)号：US20170053872A1

公开(公告)日：2017-02-23

申请号：US15235608

申请日：2016-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-jin Lee ,  Byung-lyul Park ,  Jin-ho An

IPC: H01L23/538 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L23/5384 ,  H01L21/76841 ,  H01L21/76879 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2924/18161

Abstract: Integrated circuit (IC) devices are provided including a substrate having a first sidewall defining a first through hole that is a portion of a through-silicon via (TSV) space, an interlayer insulating layer having a second sidewall and a protrusion, wherein the second sidewall defines a second through hole providing another portion of the TSV space and communicating with the first through hole, and the protrusion protrudes toward the inside of the TSV space and defines an undercut region in the first through hole, a TSV structure penetrating the substrate and the interlayer insulating layer and extending through the first through hole and the second through hole, and a via insulating layer surrounding the TSV structure in the first through hole and the second through hole.

Abstract translation: 提供集成电路（IC）装置，其包括具有限定作为穿硅通孔（TSV）空间的一部分的第一通孔的第一侧壁的衬底，具有第二侧壁和突起的层间绝缘层，其中第二通孔 侧壁限定提供TSV空间的另一部分并与第一通孔连通的第二通孔，并且突出部朝向TSV空间的内部突出，并且在第一通孔中限定底切区域，穿透基板的TSV结构， 所述层间绝缘层延伸穿过所述第一通孔和所述第二通孔;以及通孔绝缘层，其围绕所述第一通孔和所述第二通孔中的TSV结构。

公开(公告)号：US09824973B2

公开(公告)日：2017-11-21

申请号：US15235608

申请日：2016-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ho-jin Lee ,  Byung-lyul Park ,  Jin-ho An

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/538 ,  H01L23/00 ,  H01L21/768

CPC classification number: H01L23/5384 ,  H01L21/76841 ,  H01L21/76879 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/13 ,  H01L25/0657 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2924/18161

Abstract: Integrated circuit (IC) devices are provided including a substrate having a first sidewall defining a first through hole that is a portion of a through-silicon via (TSV) space, an interlayer insulating layer having a second sidewall and a protrusion, wherein the second sidewall defines a second through hole providing another portion of the TSV space and communicating with the first through hole, and the protrusion protrudes toward the inside of the TSV space and defines an undercut region in the first through hole, a TSV structure penetrating the substrate and the interlayer insulating layer and extending through the first through hole and the second through hole, and a via insulating layer surrounding the TSV structure in the first through hole and the second through hole.

公开(公告)号：US20140138819A1

公开(公告)日：2014-05-22

申请号：US14074573

申请日：2013-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-il Choi ,  Su-kyung Kim ,  Kun-sang Park ,  Seong-min Son ,  Jin-ho An ,  Do-sun Lee

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/02107 ,  H01L21/76898 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided are a semiconductor device, a method of manufacturing the same, and a semiconductor package including the same. The semiconductor device includes: a substrate having a recess region in a predetermined portion of a back side of the substrate; a wiring part disposed on a front side of the substrate and including at least one wiring layer; an insulating layer disposed on the back side of the substrate and including a first portion filling in the recess region and a second portion covering the back side of the substrate of a non-recess region other than the recess region; and a through silicon via (TSV) provided in plurality of and penetrating the first portion to be electrically connected to the at least one wiring layer.

Abstract translation: 提供半导体器件，其制造方法和包括该半导体器件的半导体封装。 半导体器件包括：衬底，其在衬底的背面的预定部分中具有凹陷区域; 布线部，其布置在所述基板的前侧，并且包括至少一个布线层; 绝缘层，设置在所述基板的背面，并且包括填充在所述凹部区域中的第一部分和覆盖所述基板的背面以外的除了所述凹部区域之外的非凹部区域的第二部分; 以及设置在多个并穿透所述第一部分以与所述至少一个布线层电连接的贯通硅通孔（TSV）。