公开(公告)号：US10325882B2

公开(公告)日：2019-06-18

申请号：US15651933

申请日：2017-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-woo Kang ,  Byung-lyul Park ,  Kyoung-hwan Kim ,  Kun-sang Park ,  Young-gyu Ahn

IPC: H01L23/02 ,  H01L25/065 ,  H01L21/02 ,  H01L21/027 ,  H01L21/311 ,  H01L21/56 ,  H01L21/768 ,  H01L23/13 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498

Abstract: A method of manufacturing a semiconductor package includes providing a substrate including a mounting region having a recess space for accommodating a semiconductor chip and a connection region surrounding the mounting region, providing a semiconductor chip in the mounting region, the semiconductor chip including a connection pad provided on a top surface of the semiconductor chip, forming a protective layer covering a top surface of the substrate and the top surface of the semiconductor chip, forming a photosensitive insulating layer on the protective layer after forming the protective layer, patterning the photosensitive insulating layer thereby exposing the protective layer, removing the exposed protective layer, and forming a redistribution line to be electrically connected to the connection pad.

公开(公告)号：US20180108639A1

公开(公告)日：2018-04-19

申请号：US15651933

申请日：2017-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-woo Kang ,  Byung-lyul Park ,  Kyoung-hwan Kim ,  Kun-sang Park ,  Young-gyu Ahn

IPC: H01L25/065 ,  H01L21/768 ,  H01L25/00 ,  H01L21/56 ,  H01L21/311 ,  H01L23/13 ,  H01L23/00 ,  H01L21/02 ,  H01L21/027 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L21/02063 ,  H01L21/0274 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/563 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/498 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/08145 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/13099

Abstract: A method of manufacturing a semiconductor package includes providing a substrate including a mounting region having a recess space for accommodating a semiconductor chip and a connection region surrounding the mounting region, providing a semiconductor chip in the mounting region, the semiconductor chip including a connection pad provided on a top surface of the semiconductor chip, forming a protective layer covering a top surface of the substrate and the top surface of the semiconductor chip, forming a photosensitive insulating layer on the protective layer after forming the protective layer, patterning the photosensitive insulating layer thereby exposing the protective layer, removing the exposed protective layer, and forming a redistribution line to be electrically connected to the connection pad.

公开(公告)号：US10777487B2

公开(公告)日：2020-09-15

申请号：US16131182

申请日：2018-09-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-il Choi ,  Kun-sang Park ,  Son-kwan Hwang ,  Ji-soon Park ,  Byung-lyul Park

IPC: H01L23/48 ,  H01L23/31 ,  H01L21/768 ,  H01L23/532 ,  H01L25/065

Abstract: An integrated circuit (IC) device includes a semiconductor substrate having a via hole extending through at least a part thereof, a conductive structure in the via hole, a conductive barrier layer adjacent the conductive structure; and a via insulating layer interposed between the semiconductor substrate and the conductive barrier layer. The conductive barrier layer may include an outer portion oxidized between the conductive barrier layer and the via insulating layer, and the oxidized outer portion of the conductive barrier layer may substantially surrounds the remaining portion of the conductive barrier layer.

公开(公告)号：US20140138819A1

公开(公告)日：2014-05-22

申请号：US14074573

申请日：2013-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-il Choi ,  Su-kyung Kim ,  Kun-sang Park ,  Seong-min Son ,  Jin-ho An ,  Do-sun Lee

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/02107 ,  H01L21/76898 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided are a semiconductor device, a method of manufacturing the same, and a semiconductor package including the same. The semiconductor device includes: a substrate having a recess region in a predetermined portion of a back side of the substrate; a wiring part disposed on a front side of the substrate and including at least one wiring layer; an insulating layer disposed on the back side of the substrate and including a first portion filling in the recess region and a second portion covering the back side of the substrate of a non-recess region other than the recess region; and a through silicon via (TSV) provided in plurality of and penetrating the first portion to be electrically connected to the at least one wiring layer.

Abstract translation: 提供半导体器件，其制造方法和包括该半导体器件的半导体封装。 半导体器件包括：衬底，其在衬底的背面的预定部分中具有凹陷区域; 布线部，其布置在所述基板的前侧，并且包括至少一个布线层; 绝缘层，设置在所述基板的背面，并且包括填充在所述凹部区域中的第一部分和覆盖所述基板的背面以外的除了所述凹部区域之外的非凹部区域的第二部分; 以及设置在多个并穿透所述第一部分以与所述至少一个布线层电连接的贯通硅通孔（TSV）。