公开(公告)号：US10079210B2

公开(公告)日：2018-09-18

申请号：US15186825

申请日：2016-06-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-sun Lee ,  Do-hyun Lee ,  Chul-sung Kim ,  Sang-jin Hyun ,  Joon-gon Lee

IPC: H01L21/02 ,  H01L23/535 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L23/535 ,  H01L21/28518 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76876 ,  H01L23/485 ,  H01L23/53209 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/785

Abstract: An integrated circuit device including a substrate having at least one fin-shaped active region, the at least one fin-shaped active region extending in a first direction, a gate line extending on the at least one fin-shaped active region in a second direction, the second direction intersecting with the first direction, a conductive region on a portion of the at least one fin-shaped active region at one side of the gate line, and a contact plug extending from the conductive region in a third direction, the third direction being perpendicular to a main plane of the substrate, may be provided. The contact plug may include a metal plug, a conductive barrier film on the conductive region, the conductive barrier film surrounding a sidewall and a bottom surface of the metal plug, the conductive barrier film including an N-rich metal nitride film, and a metal silicide film between the conductive region and the conductive barrier film.

公开(公告)号：US20140138819A1

公开(公告)日：2014-05-22

申请号：US14074573

申请日：2013-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-il Choi ,  Su-kyung Kim ,  Kun-sang Park ,  Seong-min Son ,  Jin-ho An ,  Do-sun Lee

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/02107 ,  H01L21/76898 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided are a semiconductor device, a method of manufacturing the same, and a semiconductor package including the same. The semiconductor device includes: a substrate having a recess region in a predetermined portion of a back side of the substrate; a wiring part disposed on a front side of the substrate and including at least one wiring layer; an insulating layer disposed on the back side of the substrate and including a first portion filling in the recess region and a second portion covering the back side of the substrate of a non-recess region other than the recess region; and a through silicon via (TSV) provided in plurality of and penetrating the first portion to be electrically connected to the at least one wiring layer.

Abstract translation: 提供半导体器件，其制造方法和包括该半导体器件的半导体封装。 半导体器件包括：衬底，其在衬底的背面的预定部分中具有凹陷区域; 布线部，其布置在所述基板的前侧，并且包括至少一个布线层; 绝缘层，设置在所述基板的背面，并且包括填充在所述凹部区域中的第一部分和覆盖所述基板的背面以外的除了所述凹部区域之外的非凹部区域的第二部分; 以及设置在多个并穿透所述第一部分以与所述至少一个布线层电连接的贯通硅通孔（TSV）。