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    Semiconductor package and method of manufacturing the same
    2.
    发明授权
    Semiconductor package and method of manufacturing the same 有权

    公开(公告)号：US10026724B2

    公开(公告)日：2018-07-17

    申请号：US15444277

    申请日：2017-02-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ji-hwang Kim ,  Jong-bo Shim ,  Sang-uk Han ,  Cha-jea Jo ,  Gun-ho Chang

    IPC: H01L25/00 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

    Abstract: A method of manufacturing a semiconductor package includes forming at least two partial package chip stacks, each partial package chip stack including at least two semiconductor chips each including a plurality of through substrate vias (TSVs), and including a first mold layer surrounding side surfaces of the at least two semiconductor chips, and sequentially mounting the at least two partial package chip stacks on a package substrate in a direction vertical to a top surface of the package substrate, such that the at least two partial package chip stacks include a first partial package chip stack and a second partial package chip stack directly connected to the first partial package chip stack.

    Semiconductor package
    5.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US12300665B2

    公开(公告)日：2025-05-13

    申请号：US17547382

    申请日：2021-12-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jang-woo Lee ,  Un-byoung Kang ,  Ji-hwang Kim ,  Jong-bo Shim ,  Young-kun Jee

    IPC: H01L23/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

    Abstract: A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a plurality of first chip connection units to connect the first package substrate to the first semiconductor chip, an interposer on the first semiconductor chip, the interposer having a width greater than a width of the first semiconductor chip in a direction parallel to an upper surface of the first package substrate, and an upper filling layer including a center portion and an outer portion, the center portion being between the first semiconductor chip and the interposer, and the outer portion surrounding the center portion and having a thickness greater than a thickness of the center portion in a direction perpendicular to the upper surface of the first package substrate.

    Image sensor package
    6.
    发明授权
    Image sensor package 有权

    公开(公告)号：US11637140B2

    公开(公告)日：2023-04-25

    申请号：US17202702

    申请日：2021-03-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ji-hwang Kim ,  Jong-bo Shim ,  Sang-uk Han ,  Cha-jea Jo ,  Won-il Lee

    IPC: H01L27/146

    Abstract: An image sensor package includes an image sensor chip on a package substrate, a logic chip on the package substrate and perpendicularly overlapping the image sensor chip, and a memory chip on the package substrate and perpendicularly overlapping the image sensor chip and logic chip. The logic chip processes a pixel signal output from the image sensor chip. The memory chip is electrically connected to the image sensor chip through a conductive wire and stores at least one of the pixel signal from the image sensor chip or a pixel signal processed by the logic chip. The memory chip receives the pixel signal output from the image sensor chip through the conductive wire and receives the pixel signal processed by the logic chip through the image sensor chip and the conductive wire.

    Image sensor package
    8.
    发明授权
    Image sensor package 有权

    公开(公告)号：US12113087B2

    公开(公告)日：2024-10-08

    申请号：US18127110

    申请日：2023-03-28

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ji-hwang Kim ,  Jong-bo Shim ,  Sang-uk Han ,  Cha-jea Jo ,  Won-il Lee

    IPC: H01L27/146

    CPC classification number: H01L27/14634 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14638

    Abstract: An image sensor package includes an image sensor chip on a package substrate, a logic chip on the package substrate and perpendicularly overlapping the image sensor chip, and a memory chip on the package substrate and perpendicularly overlapping the image sensor chip and logic chip. The logic chip processes a pixel signal output from the image sensor chip. The memory chip is electrically connected to the image sensor chip through a conductive wire and stores at least one of the pixel signal from the image sensor chip or a pixel signal processed by the logic chip. The memory chip receives the pixel signal output from the image sensor chip through the conductive wire and receives the pixel signal processed by the logic chip through the image sensor chip and the conductive wire.

    Semiconductor package
    9.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11227855B2

    公开(公告)日：2022-01-18

    申请号：US16407429

    申请日：2019-05-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jang-woo Lee ,  Un-byoung Kang ,  Ji-hwang Kim ,  Jong-bo Shim ,  Young-kun Jee

    IPC: H01L21/00 ,  H01L25/065 ,  H01L23/48 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

    Abstract: A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a plurality of first chip connection units to connect the first package substrate to the first semiconductor chip, an interposer on the first semiconductor chip, the interposer having a width greater than a width of the first semiconductor chip in a direction parallel to an upper surface of the first package substrate, and an upper filling layer including a center portion and an outer portion, the center portion being between the first semiconductor chip and the interposer, and the outer portion surrounding the center portion and having a thickness greater than a thickness of the center portion in a direction perpendicular to the upper surface of the first package substrate.

    Image sensor package
    10.
    发明授权
    Image sensor package 有权

    公开(公告)号：US10971535B2

    公开(公告)日：2021-04-06

    申请号：US15636801

    申请日：2017-06-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ji-hwang Kim ,  Jong-bo Shim ,  Sang-uk Han ,  Cha-jea Jo ,  Won-il Lee

    IPC: H01L27/00 ,  H01L27/146

    Abstract: An image sensor package includes an image sensor chip on a package substrate, a logic chip on the package substrate and perpendicularly overlapping the image sensor chip, and a memory chip on the package substrate and perpendicularly overlapping the image sensor chip and logic chip. The logic chip processes a pixel signal output from the image sensor chip. The memory chip is electrically connected to the image sensor chip through a conductive wire and stores at least one of the pixel signal from the image sensor chip or a pixel signal processed by the logic chip. The memory chip receives the pixel signal output from the image sensor chip through the conductive wire and receives the pixel signal processed by the logic chip through the image sensor chip and the conductive wire.

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