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    Semiconductor package
    1.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11631660B2

    公开(公告)日：2023-04-18

    申请号：US17243127

    申请日：2021-04-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Manho Lee ,  Eunseok Song ,  Kyungsuk Oh ,  Seonghwan Jeon

    IPC: H01L25/18 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00

    Abstract: A semiconductor package according to the inventive concept includes a first semiconductor chip configured to include a first semiconductor device, a first semiconductor substrate, a plurality of through electrodes penetrating the first semiconductor substrate, and a plurality of first chip connection pads arranged on an upper surface of the first semiconductor substrate; a plurality of second semiconductor chips sequentially stacked on an upper surface of the first semiconductor chip and configured to each include a second semiconductor substrate, a second semiconductor device controlled by the first semiconductor chip, and a plurality of second chip connection pads arranged on an upper surface of the second semiconductor substrate; a plurality of bonding wires configured to connect the plurality of first chip connection pads to the plurality of second chip connection pads; and a plurality of external connection terminals arranged on a lower surface of the first semiconductor chip.

    Semiconductor package
    5.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US12211829B2

    公开(公告)日：2025-01-28

    申请号：US18121664

    申请日：2023-03-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Manho Lee ,  Eunseok Song ,  Kyungsuk Oh ,  Seonghwan Jeon

    IPC: H01L25/18 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/495 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H10B80/00

    Abstract: A semiconductor package according to the inventive concept includes a first semiconductor chip configured to include a first semiconductor device, a first semiconductor substrate, a plurality of through electrodes penetrating the first semiconductor substrate, and a plurality of first chip connection pads arranged on an upper surface of the first semiconductor substrate; a plurality of second semiconductor chips sequentially stacked on an upper surface of the first semiconductor chip and configured to each include a second semiconductor substrate, a second semiconductor device controlled by the first semiconductor chip, and a plurality of second chip connection pads arranged on an upper surface of the second semiconductor substrate; a plurality of bonding wires configured to connect the plurality of first chip connection pads to the plurality of second chip connection pads; and a plurality of external connection terminals arranged on a lower surface of the first semiconductor chip.

    SEMICONDUCTOR PACKAGE
    7.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220059519A1

    公开(公告)日：2022-02-24

    申请号：US17243127

    申请日：2021-04-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Manho Lee ,  Eunseok Song ,  Kyungsuk Oh ,  Seonghwan Jeon

    IPC: H01L25/18 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00

    Abstract: A semiconductor package according to the inventive concept includes a first semiconductor chip configured to include a first semiconductor device, a first semiconductor substrate, a plurality of through electrodes penetrating the first semiconductor substrate, and a plurality of first chip connection pads arranged on an upper surface of the first semiconductor substrate; a plurality of second semiconductor chips sequentially stacked on an upper surface of the first semiconductor chip and configured to each include a second semiconductor substrate, a second semiconductor device controlled by the first semiconductor chip, and a plurality of second chip connection pads arranged on an upper surface of the second semiconductor substrate; a plurality of bonding wires configured to connect the plurality of first chip connection pads to the plurality of second chip connection pads; and a plurality of external connection terminals arranged on a lower surface of the first semiconductor chip.

    SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS
    10.
    发明申请
    SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS 有权

    公开(公告)号：US20220352128A1

    公开(公告)日：2022-11-03

    申请号：US17648549

    申请日：2022-01-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Manho Lee ,  Eunseok Song ,  Kyungsuk Oh

    IPC: H01L25/10 ,  H01L23/00 ,  H01L23/498 ,  H01L23/48

    Abstract: A semiconductor package includes a lower redistribution layer, a lower semiconductor chip and a plurality of conductive connection structures attached to the lower redistribution layer. An upper redistribution layer is disposed on the lower semiconductor chip and the plurality of conductive connection structures. An upper semiconductor chip has an active plane corresponding to an active plane of the lower semiconductor chip and is disposed on the upper redistribution layer. The lower semiconductor chip includes a semiconductor substrate having a first surface and a second surface opposite to the first substrate. An upper wiring structure is disposed on the first surface of the semiconductor substrate. A buried power rail fills a portion of a buried rail hole extending from the first surface toward the second surface. A through electrode fills a through hole extending from the second surface toward the first surface.

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