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    SEMICONDUCTOR PACKAGE
    4.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240030214A1

    公开(公告)日：2024-01-25

    申请号：US18480310

    申请日：2023-10-03

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Sang Cheon PARK ,  Dae-Woo Kim ,  Taehun Kim ,  Hyuekjae Lee

    IPC分类号： H01L25/18 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498

    CPC分类号： H01L25/18 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49822

    摘要： A semiconductor package includes a redistribution substrate, a first memory chip provided on the redistribution substrate, the first memory chip comprising a first base layer, a first circuit layer provided on a top surface of the first base layer, and a first via penetrating the first base layer and connected to the first circuit layer and the redistribution substrate, a logic chip provided on the first memory chip, and a first molding layer surrounding the first memory chip. An outer side surface of the first molding layer is coplanar with a side surface of the logic chip. At an interface of the logic chip and the first memory chip, a first chip pad provided in the first circuit layer of the first memory chip and a second chip pad of the logic chip are formed of the same material and constitute one body.

    Semiconductor package
    7.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11527509B2

    公开(公告)日：2022-12-13

    申请号：US17364541

    申请日：2021-06-30

    申请人： Samsung Electronics Co., Ltd.

    发明人： Sanghoon Lee ,  Hyuekjae Lee

    IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L23/48

    摘要： A semiconductor package including a first semiconductor chip including a first semiconductor layer having a first forward surface having a first integrated circuit thereon and a first rear surface and a plurality of first through vias electrically connected to the first integrated circuit and including at least first and second groups of first through vias, a second semiconductor chip including a second integrated circuit electrically connected to the first group of first through vias, and a third semiconductor chip including third through vias electrically connected to the second group of first through vias, wherein the first group of first through vias transfer input/output signals of the first integrated circuit, and the second group of first through vias transfer power to the first integrated circuit, may be provided.

    STACKED SEMICONDUCTOR PACKAGE
    10.
    发明申请
    STACKED SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20230076511A1

    公开(公告)日：2023-03-09

    申请号：US18054530

    申请日：2022-11-10

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Jihwan Suh ,  Un-Byoung Kang ,  Taehun Kim ,  Hyuekjae Lee ,  Jihwan Hwang ,  Sang Cheon Park

    IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/18

    摘要： A semiconductor package includes a substrate, a first semiconductor chip disposed on the substrate, and a second semiconductor chip disposed on a top surface of the first semiconductor chip. The first semiconductor chip includes a conductive pattern disposed on the top surface of the first semiconductor chip and a first protective layer covering the top surface of the first semiconductor chip and at least partially surrounds the conductive pattern. The second semiconductor chip includes a first pad that contacts a first through electrode on a bottom surface of the second semiconductor chip. A second protective layer surrounds the first pad and covers the bottom surface of the second semiconductor chip. A third protection layer fills a first recess defined in the second protective layer to face the inside of the second protective layer. The first protective layer and the third protective layer contact each other.