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公开(公告)号:US20220028915A1
公开(公告)日:2022-01-27
申请号:US17327885
申请日:2021-05-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Mihye JANG , Seungjoo NAH , Minho JANG , Heegeun JEONG
IPC: H01L27/146 , H01L27/30 , H01L23/00 , H01L21/768
Abstract: An image sensor includes a first structure including a first substrate, and a first internal wiring structure on the first substrate. The first substrate includes an active pixel region and a through electrode region around the active pixel region. The first internal wiring structure includes a plurality of first internal wiring patterns. The image sensor further includes a second structure including a second substrate and a second internal wiring structure on the second substrate. The second substrate is arranged on the first substrate. The image sensor additionally includes a through electrode layer arranged in the through electrode region to at least partially fill a through electrode trench, which penetrates the first substrate, and to connect the first internal wiring structure to the second internal wiring structure.
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公开(公告)号:US20240178259A1
公开(公告)日:2024-05-30
申请号:US18354040
申请日:2023-07-18
Applicant: Samsung Electronics Co,, Ltd.
Inventor: Doowon KWON , Minho JANG , Kyungtae LIM , Doyeon KIM , Haejung LEE
IPC: H01L27/146
CPC classification number: H01L27/14636 , H01L27/14607 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14632 , H01L27/14685 , H01L27/14687
Abstract: The inventive concepts provide a three-layered stacked image sensor in which misalignment between a through electrode and a pad is reduced and coupling noise between adjacent pads is reduced, and methods of manufacturing the same. The three-layered stacked image sensor includes an upper chip including pixels arranged in a two-dimensional array structure and a first wiring layer, each of pixels including a photodiode, a transfer gate, and a floating diffusion region, an intermediate chip including a source follower gate, a select gate, and a reset gate corresponding to each of pixels, a first silicon layer, and a second wiring layer, and a lower chip including an image sensor processor, a third wiring layer, and a second silicon layer, a cross-section of an upper portion of a through electrode extending from the second wiring layer through the first silicon layer having an inverted trapezoidal structure.
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公开(公告)号:US20240153883A1
公开(公告)日:2024-05-09
申请号:US18387729
申请日:2023-11-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seunghoon HAN , Doowon KWON , Taeyeong KIM , Minho JANG , Sohye CHO , Haesung KIM , Hyeonsoo PARK
IPC: H01L23/544 , H01L21/66
CPC classification number: H01L23/544 , H01L22/12 , H01L2223/54426
Abstract: Provided is a device including a substrate and an overlay target structure provided on the substrate, the overlay target structure includes a first alignment key having a plurality of line masks having a first width and arranged at a first pitch, a second alignment key having a plurality of line masks having a second width and arranged at a second pitch, and a nanostructure layer arranged between the first alignment key and the second alignment key, and including a plurality of nanostructures having widths less than or equal to the first width and the second width, and arranged at a pitch less than the first pitch and the second pitch.
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公开(公告)号:US20230142858A1
公开(公告)日:2023-05-11
申请号:US17814085
申请日:2022-07-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Minho JANG , Seungkuk Kang , Kwangmin Lee , Insung Joe
IPC: H01L27/146 , H01L27/30 , H04N5/369
CPC classification number: H01L27/14621 , H01L27/14627 , H01L27/307 , H01L27/14603 , H04N5/3698
Abstract: An image sensor includes a substrate including a plurality of photoelectric conversion elements and a variable filter layer disposed on the substrate. The variable filter layer includes a plurality of first electrodes extending in a first direction, and having a first width in a second direction, a first electro-optical material layer disposed on the plurality of first electrodes, a light-transmitting electrode disposed on the first electro-optical material layer, a second electro-optical material layer disposed on the light-transmitting electrode, and a plurality of second electrodes disposed on the second electro-optical material layer, extending in the second direction, and having a second width in the first direction.
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公开(公告)号:US20220093657A1
公开(公告)日:2022-03-24
申请号:US17343062
申请日:2021-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eunyoung JO , Minho JANG , Insung JOE , Minsung HEO , Jaesung HUR
IPC: H01L27/146
Abstract: An image sensor including a first pixel, a second pixel, a pixel isolation structure between the first pixel and the second pixel, a first rear anti-reflecting layer disposed on the first pixel, the second pixel, and the pixel isolation structure; a fence disposed on the first rear anti-reflecting layer, the fence being aligned with the pixel isolation structure; and a second rear anti-reflecting layer disposed on the first rear anti-reflecting layer and the fence, wherein an air gap is present between the first rear anti-reflecting layer and the fence, and wherein the air gap is surrounded by the second rear anti-reflecting layer.
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公开(公告)号:US20250031476A1
公开(公告)日:2025-01-23
申请号:US18669876
申请日:2024-05-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minho JANG , Jonghyun GO , Doowon KWON , Changkyu LEE , Yongkun JO
IPC: H01L27/146 , H01L23/00 , H01L23/522 , H04N25/79
Abstract: An image sensor includes a first semiconductor chip including a first semiconductor substrate including a plurality of pixels and a first wiring structure having a first bonding pad; a second semiconductor chip including a second semiconductor substrate having pixel signal generator circuits, a second wiring structure on the second semiconductor substrate and having an upper bonding pad bonded to the first bonding pad, a back side insulating layer on a lower surface of the second semiconductor substrate and including a shielding metal pattern buried therein, and a conductive through-via penetrating the back side insulating layer and the first semiconductor substrate, and a third semiconductor chip including a bonding layer having a lower bonding pad connected to the conductive through via, a third semiconductor substrate including logic devices, and a third wiring structure having a third bonding pad bonded to the lower bonding pad.
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公开(公告)号:US20220149101A1
公开(公告)日:2022-05-12
申请号:US17377792
申请日:2021-07-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Chul LEE , Beomsuk LEE , Minho JANG , Kwansik CHO
IPC: H01L27/146
Abstract: An image sensor includes a first chip including a pixel region, a pad region, and an optical black region interposed between the pixel region and the pad region, and a second chip being in contact with a first surface of the first chip and including circuits for driving the first chip. The first chip includes a first substrate, a device isolation portion disposed in the first substrate and defining unit pixels, an interlayer insulating layer interposed between the first substrate and the second chip, a connection wiring structure disposed in the interlayer insulating layer, and a connection contact plug disposed in the interlayer insulating layer and connecting the connection wiring structure to the device isolation portion in the optical black region. The image sensor further includes a conductive pad disposed in the first chip or the second chip.
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公开(公告)号:US20240395845A1
公开(公告)日:2024-11-28
申请号:US18796684
申请日:2024-08-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Chul LEE , Beomsuk LEE , Minho JANG , Kwansik CHO
IPC: H01L27/146
Abstract: An image sensor includes a first chip including a pixel region, a pad region, and an optical black region interposed between the pixel region and the pad region, and a second chip being in contact with a first surface of the first chip and including circuits for driving the first chip. The first chip includes a first substrate, a device isolation portion disposed in the first substrate and defining unit pixels, an interlayer insulating layer interposed between the first substrate and the second chip, a connection wiring structure disposed in the interlayer insulating layer, and a connection contact plug disposed in the interlayer insulating layer and connecting the connection wiring structure to the device isolation portion in the optical black region. The image sensor further includes a conductive pad disposed in the first chip or the second chip.
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公开(公告)号:US20240363665A1
公开(公告)日:2024-10-31
申请号:US18384025
申请日:2023-10-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Minho JANG , Doowon KWON , Doyeon KIM , GwideokRyan LEE , Kyungtae LIM
IPC: H01L27/146 , H01L21/768 , H01L23/00 , H01L23/48
CPC classification number: H01L27/14634 , H01L21/76898 , H01L23/481 , H01L24/08 , H01L27/14636 , H01L2224/08145
Abstract: A semiconductor device includes a first substrate having a first semiconductor layer with a first electronic element, a first insulation layer on the first semiconductor layer, a first conductive pad in the first insulation layer and exposed through a first side of the first substrate, and a first wire in the first insulation layer connected to the first semiconductor layer, and a second substrate attached to the first side of the first substrate and having a second semiconductor layer with a second electronic element, a second insulation layer on the second semiconductor layer, a second wire in the second insulation layer, a through via penetrating the second semiconductor layer and connected to the second wire, and a second conductive pad connecting the through via and the first conductive pad of the first substrate, at least a part of the second conductive pad being in the second semiconductor layer.
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公开(公告)号:US20230282669A1
公开(公告)日:2023-09-07
申请号:US18155868
申请日:2023-01-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Doowon KWON , Junghye KIM , Donghyun KIM , Minho JANG
IPC: H01L27/146 , H01L23/00
CPC classification number: H01L27/14636 , H01L24/08 , H01L24/80 , H01L27/14634 , H01L27/1469 , H01L2224/08145 , H01L2224/80895 , H01L2224/80896
Abstract: An image sensor includes a first structure and a second structure stacked on the first structure in a vertical direction, the first structure including first and second pixel pads electrically connected to first and second floating diffusion regions, respectively, and a first coupling suppression line penetrating between the first and second pixel pads, and electrically connected to the first ground structure, and the second structure including third and fourth pixel pads electrically connected to first and second source-follower gates, respectively; and a second coupling suppression line penetrating between the third and fourth pixel pads, and electrically connected to the second ground structure.
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