公开(公告)号：US20140370704A1

公开(公告)日：2014-12-18

申请号：US14291670

申请日：2014-05-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hoon AHN ,  Seung-Hyuk CHOI ,  Kyu-Hee HAN

IPC: H01L21/02 ,  H01L21/768

CPC classification number: H01L21/02203 ,  H01L21/02126 ,  H01L21/02208 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/7682 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of forming a dielectric layer are provided. The methods may include introducing oxygen radicals and organic silicon precursors into a chamber to form a preliminary dielectric layer on a substrate. Each of the organic silicon precursors may include a carbon bridge and a porogen such that the preliminary dielectric layer may include carbon bridges and porogens. The methods may also include removing at least some of the porogens from the preliminary dielectric layer to form a porous dielectric layer including the carbon bridges.

Abstract translation: 提供形成电介质层的方法。 所述方法可以包括将氧自由基和有机硅前体引入室中以在基底上形成预备介电层。 每个有机硅前体可以包括碳桥和致孔剂，使得预备介电层可以包括碳桥和致孔剂。 所述方法还可以包括从预备介电层中去除至少一些致孔剂以形成包括碳桥的多孔介电层。

公开(公告)号：US20180358262A1

公开(公告)日：2018-12-13

申请号：US15870175

申请日：2018-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Siqing LU ,  Sang-Hoon AHN ,  Xinglong CHEN ,  Ki-Hyun KIM ,  Kyu-In SHIM

IPC: H01L21/768 ,  H01L23/528 ,  H01L21/02 ,  H01L21/311 ,  H01L23/522

Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes forming a first insulting layer on a substrate, forming a first conductor pattern in the first insulating layer, forming a second insulating layer on the first insulating layer, and forming a second wiring pattern and a contact via in the second insulating layer, wherein a top surface of the first insulating layer is higher than a top surface of the first conductor pattern.

公开(公告)号：US20160293552A1

公开(公告)日：2016-10-06

申请号：US15048998

申请日：2016-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Jin YIM ,  Sang-Hoon AHN ,  Thomas OSZINDA ,  Jong-Min BAEK ,  Byung Hee KIM ,  Nae-In LEE ,  Kee-Young JUN

IPC: H01L23/532 ,  H01L23/528

CPC classification number: H01L23/53238 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76867 ,  H01L23/5283 ,  H01L23/53295

Abstract: A semiconductor device includes an insulating interlayer on a first region of a substrate. The insulating interlayer has a recess therein and includes a low-k material having porosity. A damage curing layer is formed on an inner surface of the recess. A barrier pattern is formed on the damage curing layer. A copper structure fills the recess and is disposed on the barrier pattern. The copper structure includes a copper pattern and a copper-manganese capping pattern covering a surface of the copper pattern. A diffusion of metal in a wiring structure of the semiconductor device may be prevented, and thus a resistance of the wiring structure may decrease.

Abstract translation: 半导体器件包括在衬底的第一区域上的绝缘中间层。 绝缘中间层具有凹部，并且包括具有多孔性的低k材料。 在凹部的内表面上形成损伤固化层。 在损伤固化层上形成阻挡图案。 铜结构填充凹部并设置在阻挡图案上。 铜结构包括铜图案和覆盖铜图案表面的铜 - 锰覆盖图案。 可以防止金属在半导体器件的布线结构中的扩散，因此布线结构的电阻可能降低。

公开(公告)号：US20210233862A1

公开(公告)日：2021-07-29

申请号：US17228861

申请日：2021-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-Kwan KIM ,  Jae-Wha PARK ,  Sang-Hoon AHN

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/311 ,  H01L21/288 ,  H01L21/321 ,  H01L23/528

Abstract: A semiconductor may include a first inter metal dielectric (IMD) layer, a first blocking layer on the first IMD layer, a metal wiring and a second blocking layer. The first inter metal dielectric (IMD) layer may be formed on a substrate, the first IMD layer may include a low-k material having a dielectric constant lower than a dielectric constant of silicon oxide. The first blocking layer may be formed on the first IMD layer. The first blocking layer may include an oxide having a dielectric constant higher than the dielectric constant of the first IMD layer. The metal wiring may be through the first IMD layer and the first blocking layer. The second blocking layer may be formed on the metal wiring and the first blocking layer. The second blocking layer may include a nitride. The first and second blocking layers may reduce or prevent from the out gassing, so that a semiconductor device may have good characteristics.

公开(公告)号：US20200035613A1

公开(公告)日：2020-01-30

申请号：US16285735

申请日：2019-02-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun-Kwan KIM ,  Jae-Wha PARK ,  Sang-Hoon AHN

IPC: H01L23/532 ,  H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/311 ,  H01L21/288 ,  H01L21/321

Abstract: A semiconductor may include a first inter metal dielectric (IMD) layer, a first blocking layer on the first IMD layer, a metal wiring and a second blocking layer. The first inter metal dielectric (IMD) layer may be formed on a substrate, the first IMD layer may include a low-k material having a dielectric constant lower than a dielectric constant of silicon oxide. The first blocking layer may be formed on the first IMD layer. The first blocking layer may include an oxide having a dielectric constant higher than the dielectric constant of the first IMD layer. The metal wiring may be through the first IMD layer and the first blocking layer. The second blocking layer may be formed on the metal wiring and the first blocking layer. The second blocking layer may include a nitride. The first and second blocking layers may reduce or prevent from the out gassing, so that a semiconductor device may have good characteristics.

公开(公告)号：US20160372415A1

公开(公告)日：2016-12-22

申请号：US15015296

申请日：2016-02-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-Kong SIEW ,  Sang-Hoon AHN

IPC: H01L23/528 ,  H01L29/06 ,  H01L23/522 ,  H01L23/532 ,  H01L27/088

CPC classification number: H01L27/0886 ,  H01L21/76264 ,  H01L21/76289 ,  H01L21/76811 ,  H01L21/7682 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76897 ,  H01L23/4821 ,  H01L23/5222 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/66545

Abstract: A semiconductor device may include a plurality of wiring structures spaced apart from each other, a protection pattern including a metal nitride on each of the wiring structures, a spacer on a sidewall of the protection pattern, and an insulating interlayer structure containing the wiring structures and having an air gap between the wiring structures.

Abstract translation: 半导体器件可以包括彼此间隔开的多个布线结构，在每个布线结构上包括金属氮化物的保护图案，保护图案的侧壁上的间隔物和包含布线结构的绝缘夹层结构， 在布线结构之间具有气隙。

公开(公告)号：US20160211211A1

公开(公告)日：2016-07-21

申请号：US14984085

申请日：2015-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Jin YIM ,  Woo-Kyung YOU ,  Jong-Min BAEK ,  Sang-Hoon AHN ,  Thomas OSZINDA ,  Kee-Young JUN

IPC: H01L23/528 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L23/53295 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is provided. The semiconductor device includes a first porous interlayer insulating film having a low dielectric constant and including a first region and a second region, a second interlayer insulating film formed on the first interlayer insulating film in the first region, a plurality of first conductive patterns formed in the second interlayer insulating film such that the plurality of first conductive patterns are spaced apart from each other, at least one second conductive pattern formed in the first interlayer insulating film in the second region and air gaps disposed at lateral sides of the plurality of first conductive patterns.

Abstract translation: 提供半导体器件。 半导体器件包括具有低介电常数并且包括第一区域和第二区域的第一多孔层间绝缘膜，形成在第一区域中的第一层间绝缘膜上的第二层间绝缘膜，形成在第一区域中的多个第一导电图案 所述第二层间绝缘膜使得所述多个第一导电图案彼此间隔开，形成在所述第二区域中的所述第一层间绝缘膜中的至少一个第二导电图案和设置在所述多个第一导电性 模式。