公开(公告)号：US11784139B2

公开(公告)日：2023-10-10

申请号：US17750903

申请日：2022-05-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungwook Kim ,  Ayoung Kim ,  Seongwon Jeong ,  Sangsu Ha

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/562 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2924/3512

Abstract: Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation substrate and electrically connected to the conductive layer, and at least one trench provided at a portion of the insulation substrate adjacent to at least one of the upper pads and configured to block stress, which is generated by an expansion of the insulation substrate, from spreading to the at least one of the upper pads.

公开(公告)号：US20230130436A1

公开(公告)日：2023-04-27

申请号：US17743971

申请日：2022-05-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byungwook Kim ,  Ayoung Kim ,  Seongwon Jeong ,  Sangsu Ha

IPC: H01L23/498

Abstract: A semiconductor package includes a package substrate having a first surface and a second surface opposite to the first surface, and including a plurality of bonding pads exposed to the first surface and a plurality of solder bumps respectively disposed on the bonding pads, and at least one semiconductor device arranged on the package substrate. Each of the solder bumps includes a bump body disposed on the bonding pad, a plurality of bonding particles provided inside the bump body to be adjacent to the bonding pad, and a first metal compound layer provided to surround the bonding particles and having a protrusion structure for strengthening adhesion with the bonding pad.

公开(公告)号：US11749630B2

公开(公告)日：2023-09-05

申请号：US17199674

申请日：2021-03-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byungwook Kim ,  Ayoung Kim ,  Haeseong Jeong ,  Sangsu Ha

IPC: H01L23/528 ,  H01L23/532 ,  H01L23/00

CPC classification number: H01L24/14 ,  H01L23/528 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/562

Abstract: A semiconductor chip includes a back end of line (BEOL) structure on a first surface of the semiconductor substrate and including a conductive connection structure and an interlayer insulating layer covering the conductive connection structure, a conductive reinforcing layer arranged on the BEOL structure, a cover insulating layer covering the conductive reinforcing layer, an under bump metal (UBM) layer including a plurality of pad connection portions connected to the conductive reinforcing layer through openings in the cover insulating layer, and a plurality of first connection bumps arranged on the plurality of pad connection portions of the UBM layer, electrically connected to one another through the conductive reinforcing layer, and located to overlap the conductive reinforcing layer. The conductive reinforcing layer has a plate shape and extends parallel to the first surface of the semiconductor substrate.

公开(公告)号：US09402315B2

公开(公告)日：2016-07-26

申请号：US14457493

申请日：2014-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunsuk Chun ,  Soojae Park ,  Seungbae Lee ,  Sangsu Ha

IPC: H05K1/18 ,  H05K1/11 ,  H01L23/522 ,  H01L25/065 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00

CPC classification number: H05K1/18 ,  H01L23/5226 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/13014 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81121 ,  H01L2224/81141 ,  H01L2224/81815 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H05K1/11 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Provided is a semiconductor package including a wiring substrate having top and bottom surfaces. A first semiconductor chip is disposed on the wiring substrate in a flip-chip manner. The first semiconductor chip has a first surface facing the top surface of the wiring substrate and a second surface opposite to the first surface. First connection members are disposed between the wiring substrate and the first semiconductor chip. The first connection members include first and second contact members each including one or more magnetic materials. The first contact members include portions disposed in the second contact members. The one or more magnetic material of the first contact members have an opposite polar orientation to that of the second contact members.

Abstract translation: 提供一种包括具有顶表面和底表面的布线基板的半导体封装。 第一半导体芯片以倒装芯片的方式设置在布线基板上。 第一半导体芯片具有面对布线基板的上表面的第一表面和与第一表面相对的第二表面。 第一连接构件设置在布线基板和第一半导体芯片之间。 第一连接构件包括每个包括一个或多个磁性材料的第一和第二接触构件。 第一接触构件包括设置在第二接触构件中的部分。 第一接触构件的一个或多个磁性材料具有与第二接触构件相反的极性取向。

公开(公告)号：US11342283B2

公开(公告)日：2022-05-24

申请号：US16810091

申请日：2020-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungwook Kim ,  Ayoung Kim ,  Seongwon Jeong ,  Sangsu Ha

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/00

Abstract: Provided a package substrate including an insulation substrate, a conductive layer provided in the insulation substrate, upper pads provided on an upper surface of the insulation substrate and electrically connected to the conductive layer, lower pads provided on a lower surface of the insulation substrate and electrically connected to the conductive layer, and at least one trench provided at a portion of the insulation substrate adjacent to at least one of the upper pads and configured to block stress, which is generated by an expansion of the insulation substrate, from spreading to the at least one of the upper pads.

公开(公告)号：US11068150B2

公开(公告)日：2021-07-20

申请号：US16762750

申请日：2018-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangsu Ha ,  Seonghun Kim ,  Jungsoo Kim ,  Taehoon Kim

IPC: G06F3/0488 ,  G06F3/041 ,  G06F3/16 ,  G06F21/32

Abstract: Various embodiments of the present invention relate to a method for compensating for a pressure value of a force sensor and an electronic device using the same, the electronic device comprising: a touch screen display; a force sensor bonded to a lower portion of the touch screen display; a memory; and a processor electrically connected to the touch screen display, the force sensor, and the memory, wherein the processor is configured to: obtain a pressure value of the touch screen display and a pressure value of the force sensor; measure the correlation between the obtained pressure value of the touch screen display and the pressure value of the force sensor; identify a spacing state between the touch screen display and the force sensor by using the correlation; determine whether the spacing state is of a predetermined distance or less and compensate for the pressure value for determining whether to operate the force sensor by using a predetermined reference value when the spacing state is of the predetermined distance or less, thereby sensing the spacing state in real time when spacing occurs between the touch screen display and the force sensor of the electronic device, and compensating for the pressure value of the force sensor such that user convenience can be improved. In addition to the embodiments disclosed in the present invention, other various embodiments are possible.