INTEGRATED CIRCUIT DEVICE WITH TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES
    1.
    发明申请
    INTEGRATED CIRCUIT DEVICE WITH TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES 有权
    具有不同阈值电压的晶体管的集成电路器件

    公开(公告)号:US20130328133A1

    公开(公告)日:2013-12-12

    申请号:US13838172

    申请日:2013-03-15

    CPC classification number: H01L27/088 H01L21/823412

    Abstract: Integrated circuit device with transistors having different threshold voltages and methods of forming the device are provided. The device may include the first, second and third transistors having threshold voltages different from each other. The first transistor may be free of a stacking fault and the second transistor may include a stacking fault. The concentration of the channel implant region of the third transistor may be different from the concentration of the channel implant region of the first transistor.

    Abstract translation: 提供具有不同阈值电压的晶体管的集成电路器件和形成器件的方法。 该器件可以包括具有彼此不同的阈值电压的第一,第二和第三晶体管。 第一晶体管可以没有堆垛层错,并且第二晶体管可能包括堆垛层错。 第三晶体管的沟道注入区域的浓度可以不同于第一晶体管的沟道注入区域的浓度。

    Integrated circuit device with transistors having different threshold voltages
    3.
    发明授权
    Integrated circuit device with transistors having different threshold voltages 有权
    具有不同阈值电压的晶体管的集成电路器件

    公开(公告)号:US09240408B2

    公开(公告)日:2016-01-19

    申请号:US13838172

    申请日:2013-03-15

    CPC classification number: H01L27/088 H01L21/823412

    Abstract: Integrated circuit device with transistors having different threshold voltages and methods of forming the device are provided. The device may include the first, second and third transistors having threshold voltages different from each other. The first transistor may be free of a stacking fault and the second transistor may include a stacking fault. The concentration of the channel implant region of the third transistor may be different from the concentration of the channel implant region of the first transistor.

    Abstract translation: 提供具有不同阈值电压的晶体管的集成电路器件和形成器件的方法。 该器件可以包括具有彼此不同的阈值电压的第一,第二和第三晶体管。 第一晶体管可以没有堆垛层错,并且第二晶体管可能包括堆垛层错。 第三晶体管的沟道注入区域的浓度可以不同于第一晶体管的沟道注入区域的浓度。

    NAND flash memory device and method of making same

    公开(公告)号:USRE47169E1

    公开(公告)日:2018-12-18

    申请号:US15047077

    申请日:2016-02-18

    Abstract: An integrated circuit includes a NAND string including a string selection transistor SST and a ground selection transistor GST disposed at either end of series-connected memory storage cells MC. Each of the memory storage cells is a memory transistor having a floating gate, and at least one of the string selection transistor SST and the ground selection transistor GST is a memory transistor having a floating gate. The threshold voltage Vth of programmable string selection transistors SST and the ground selection transistor GST is variable and user controllable and need not be established by implantation during manufacture. Each of the programmable string selection transistors SST and the ground selection transistors GST in a memory block may be used to store random data, thus increasing the memory storage capacity of the flash memory device.

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