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公开(公告)号：US10541690B2
公开(公告)日：2020-01-21
申请号：US15443060
申请日：2017-02-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangheon Lee , Jaehyun Kim , Kiyoung Choi , Soojung Ryu
Abstract: In a method and device to align phases of a first clock signal and a second clock signal, include a phase detector, a delay generator, and a controller. The phase detector is configured to generate a preceding signal and a succeeding signal with respect to the first clock signal to detect a relationship between phases of the first clock signal and the second clock signal. The delay generator is configured to delay the first clock signal when the second clock signal falls behind the succeeding signal with respect to the first clock signal. The controller is configured to determine whether the phases of the first clock signal and the second clock signal are aligned with each other according to the relationship detected by the phase detector.
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公开(公告)号：US10482033B2
公开(公告)日：2019-11-19
申请号：US15467104
申请日：2017-03-23
Inventor： Sangheon Lee , Dongwoo Lee , Kiyoung Choi , Soojung Ryu
IPC: G06F12/126 , G06F12/0895
Abstract: A memory controller includes a dirty group detector configured to, in response to receiving a request for writing data to a memory, modify addresses of a cache group related to a physical address of the memory, increase counters corresponding to the modified addresses of the cache group, and detect whether the cache group is in a dirty state based on the counters; and a dirty list manager configured to manage the cache group in the dirty state and a dirty list including dirty bits according to a result of the detecting; wherein the dirty bits indicate whether a cache set included in the cache group is in the dirty state.
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公开(公告)号：US09811317B2
公开(公告)日：2017-11-07
申请号：US14665205
申请日：2015-03-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Changmoo Kim , Hyeongseok Yu , Soojung Ryu , Yeongon Cho
CPC classification number: G06F7/483 , G06F5/012 , G06F2207/483 , H03M7/24
Abstract: Provided are a method of controlling a range of representable numbers includes receiving a floating point value represented by an exponent and a mantissa, each represented by a predetermined numbers of bits, determining a bit configuration of the exponent and the mantissa of the floating point value based on a value of a most significant bit of the exponent of the floating point value, and determining a constant required for calculation of the floating point value according to the determined bit configuration of the exponent, and an apparatus for providing such a method.
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公开(公告)号：US12174761B2
公开(公告)日：2024-12-24
申请号：US18212979
申请日：2023-06-22
Applicant: SAMSUNG ELECTRONICS CO., LTD. , SNU R&DB FOUNDATION
Inventor： Seung Wook Lee , Soojung Ryu , Jintaek Kang , Sunjung Lee
Abstract: An accelerator, an operation method of the accelerator, and an accelerator system including the accelerator are disclosed. The operation method includes receiving one or more workloads assigned on an accelerator, determining reuse data of the workloads based on hardware resource information and/or a memory access cost of the accelerator when a plurality of processing units included in the accelerator performs the workloads, and providing a result of performing the workloads.
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公开(公告)号：US10347219B2
公开(公告)日：2019-07-09
申请号：US14819193
申请日：2015-08-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seunghun Jin , Kwontaek Kwon , Jeongae Park , Soojung Ryu , Yeongon Cho
Abstract: A rendering method includes receiving an input including pixel pattern information of a device configured to display a rendered image, generating a pixel pattern of the rendered image using the received input indicating pixel pattern information, and outputting a pixel value of the rendered image into a frame buffer using the generated pixel pattern.
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Patent Agency Ranking
公开(公告)号：US10332231B2
公开(公告)日：2019-06-25
申请号：US15407980
申请日：2017-01-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangoak Woo , Jongpil Son , Seungcheol Baek , Soojung Ryu
Abstract: A computing system includes a memory device comprising a memory array and an internal processor configured to perform a first sub pipeline of a graphics pipeline for tile-based rendering by using graphics data stored in the memory array, for offload processing of the first sub pipeline from a host processor; and the host processor configured to perform a second sub pipeline of the graphics pipeline by using a result of the first sub pipeline stored in the memory array.
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公开(公告)号：US10152765B2
公开(公告)日：2018-12-11
申请号：US14942316
申请日：2015-11-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sangheon Lee , Soojung Ryu , Yeongon Cho
Abstract: A texture processing method of processing a compressed texel block in which texels constituting a texture are compressed into a predetermined block unit includes obtaining, based on the compressed texel block, a representative value of texels constituting a texel block, a weight for each of the texels constituting the texel block, and an index of the representative value and the weight corresponding to each of the texels constituting the texel block; storing the representative value, the weight, and the index in a texture cache; reading the representative value and the weight from the texture cache according to an index corresponding to a requested texel; generating texels based on the read representative value and the read weight; and performing texture filtering using the generated texels.
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公开(公告)号：US09983910B2
公开(公告)日：2018-05-29
申请号：US15146044
申请日：2016-05-04
Inventor： Minseok Lee , John Dongjun Kim , Woong Seo , Soojung Ryu , Yeongon Cho
CPC classification number: G06F9/5038 , G06F9/46
Abstract: A processor and corresponding method are described including cores having a thread set allocated based on a pre-set implementation order, and a controller configured to receive scheduling information determined based on an implementation pattern regarding the allocated thread set from one of the cores and transmit the scheduling information to another of the cores. The one of cores determines the scheduling information according to characteristics of an application when implementation of the thread set is completed. Each of the cores re-determines an implementation order regarding the allocated thread set based on the determined scheduling information.
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公开(公告)号：US20170250695A1
公开(公告)日：2017-08-31
申请号：US15443060
申请日：2017-02-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangheon Lee , Jaehyun Kim , Kiyoung Choi , Soojung Ryu
Abstract: In a method and device to align phases of a first clock signal and a second clock signal, include a phase detector, a delay generator, and a controller. The phase detector is configured to generate a preceding signal and a succeeding signal with respect to the first clock signal to detect a relationship between phases of the first clock signal and the second clock signal. The delay generator is configured to delay the first clock signal when the second clock signal falls behind the succeeding signal with respect to the first clock signal. The controller is configured to determine whether the phases of the first clock signal and the second clock signal are aligned with each other according to the relationship detected by the phase detector.
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公开(公告)号：US20160042561A1
公开(公告)日：2016-02-11
申请号：US14823554
申请日：2015-08-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongjoon Yoo , Sundeep Krishnadasan , Soojung Ryu , Seokyoon Jung , John Brothers
IPC: G06T15/80
CPC classification number: G06T15/80 , G06T11/203 , G06T11/40
Abstract: A method of rendering at least one of paths forming an object includes setting an initial value to each of tiles included in a frame based on a position and a proceeding direction of the at least one of paths, calculating a winding number of each of the tiles through which the at least one of paths passes, among the tiles included in the frame, based on the set initial value, and determining whether to perform shading based on the set initial value and the calculated winding number.
Abstract translation: 一种呈现形成对象的路径中的至少一个的方法包括：基于所述至少一个路径的位置和行进方向，将包括在帧中的每个瓦片的初始值设置为一个，计算每个瓦片的卷绕数量 所述至少一个路径通过所述至少一个路径在包括在所述帧中的所述瓦片之间，基于所设置的初始值，以及基于所设置的初始值和所计算的线圈数量来确定是否执行着色。
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