公开(公告)号：US20220328690A1

公开(公告)日：2022-10-13

申请号：US17849995

申请日：2022-06-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chang ,  Chih-Chien Chi ,  Chen-Yuan Kao ,  Hung-Wen Su ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Jun-Yi Ruan

IPC: H01L29/78 ,  H01L29/66 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L23/532 ,  H01L21/8238 ,  H01L27/092

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US09330915B2

公开(公告)日：2016-05-03

申请号：US14102072

申请日：2013-12-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Hong-Hui Hsu ,  Yao-Jen Chang

IPC: H01L21/033 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/0337 ,  H01L21/0332 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7684 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A robust metallization profile is formed by pre-treat an anti-reflective coating layer by plasma before forming a hard mask layer. Pre-treatment is helpful especially in small feature size process, for example, 50 nm and below. By changing constitution of a surface layer of the anti-reflective coating, interface of the anti-reflective coating layer and the hard mask layer is smoothed which results in less overhang and better gap-filling performance.

Abstract translation: 通过在形成硬掩模层之前通过等离子体预处理抗反射涂层来形成坚固的金属化轮廓。 预处理有助于特别是在小特征尺寸过程中，例如50nm及以下。 通过改变抗反射涂层的表面层的结构，抗反射涂层和硬掩模层的界面被平滑化，这导致较少的悬垂和更好的间隙填充性能。

公开(公告)号：US20210074581A1

公开(公告)日：2021-03-11

申请号：US17099263

申请日：2020-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Cheng Chou ,  Chih-Chien Chi ,  Chung-Chi Ko ,  Yao-Jen Chang ,  Chen-Yuan Kao ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Tze-Liang Lee ,  Jun-Yi Ruan

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/84 ,  H01L29/66 ,  H01L23/522 ,  H01L23/528 ,  H01L29/78

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US20250149486A1

公开(公告)日：2025-05-08

申请号：US18433908

申请日：2024-02-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chang ,  Chung-Yu Lu ,  Ping-Kang Huang ,  Sao-Ling Chiu ,  Hsien-Pin Hu

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/065

Abstract: A method includes forming a first conductive pillar on an interposer; forming a second conductive pillar on the interposer, wherein the second conductive pillar includes a barrier layer; bonding a first semiconductor device to the first conductive pillar by a first bonding region that includes more inter-metallic compound than solder; and bonding the first semiconductor device to the second conductive pillar by a second bonding region that includes more solder than inter-metallic compound.

公开(公告)号：US20240395939A1

公开(公告)日：2024-11-28

申请号：US18790280

申请日：2024-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chang ,  Chih-Chien Chi ,  Chen-Yuan Kao ,  Hung-Wen Su ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Jun-Yi Ruan

IPC: H01L29/78 ,  H01L21/768 ,  H01L21/8238 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/092 ,  H01L29/66

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US11374127B2

公开(公告)日：2022-06-28

申请号：US16939199

申请日：2020-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chang ,  Chih-Chien Chi ,  Chen-Yuan Kao ,  Hung-Wen Su ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Jun-Yi Ruan

IPC: H01L21/00 ,  H01L29/78 ,  H01L29/66 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L23/532 ,  H01L21/8238 ,  H01L27/092

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US11328952B2

公开(公告)日：2022-05-10

申请号：US17099263

申请日：2020-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Cheng Chou ,  Chih-Chien Chi ,  Chung-Chi Ko ,  Yao-Jen Chang ,  Chen-Yuan Kao ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Tze-Liang Lee ,  Jun-Yi Ruan

IPC: H01L21/768 ,  H01L21/8234 ,  H01L23/532 ,  H01L21/84 ,  H01L29/66 ,  H01L23/522 ,  H01L23/528 ,  H01L29/78 ,  H01L29/08

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US20150162280A1

公开(公告)日：2015-06-11

申请号：US14102072

申请日：2013-12-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shing-Chyang Pan ,  Ching-Hua Hsieh ,  Hong-Hui Hsu ,  Yao-Jen Chang

IPC: H01L23/522 ,  H01L21/033 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L21/0337 ,  H01L21/0332 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7684 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A robust metallization profile is formed by pre-treat an anti-reflective coating layer by plasma before forming a hard mask layer. Pre-treatment is helpful especially in small feature size process, for example, 50 nm and below. By changing constitution of a surface layer of the anti-reflective coating, interface of the anti-reflective coating layer and the hard mask layer is smoothed which results in less overhang and better gap-filling performance.

Abstract translation: 通过在形成硬掩模层之前通过等离子体预处理抗反射涂层来形成坚固的金属化轮廓。 预处理有助于特别是在小特征尺寸过程中，例如50nm及以下。 通过改变抗反射涂层的表面层的结构，抗反射涂层和硬掩模层的界面被平滑化，这导致较少的悬垂和更好的间隙填充性能。

公开(公告)号：US12166128B2

公开(公告)日：2024-12-10

申请号：US18360344

申请日：2023-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chang ,  Chih-Chien Chi ,  Chen-Yuan Kao ,  Hung-Wen Su ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Jun-Yi Ruan

IPC: H01L21/00 ,  H01L21/768 ,  H01L21/8238 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US20230369500A1

公开(公告)日：2023-11-16

申请号：US18360344

申请日：2023-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yao-Jen Chang ,  Chih-Chien Chi ,  Chen-Yuan Kao ,  Hung-Wen Su ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Jun-Yi Ruan

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L23/522 ,  H01L27/092 ,  H01L21/8238

CPC classification number: H01L29/7851 ,  H01L29/66545 ,  H01L29/66795 ,  H01L21/76816 ,  H01L23/5329 ,  H01L23/528 ,  H01L23/5226 ,  H01L21/76804 ,  H01L27/0924 ,  H01L21/823821

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.