公开(公告)号：US20230268224A1

公开(公告)日：2023-08-24

申请号：US18309131

申请日：2023-04-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Jen Lo ,  Po-Cheng Shih ,  Syun-Ming Jang ,  Tze-Liang Lee

IPC分类号： H01L21/768 ,  H01L21/027 ,  G03F7/20 ,  G03F7/038 ,  G03F7/039

CPC分类号： H01L21/76823 ,  H01L21/76802 ,  H01L21/0274 ,  G03F7/2022 ,  G03F7/038 ,  G03F7/039 ,  G03F7/2004 ,  H01L21/76877

摘要： A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

公开(公告)号：US20220328690A1

公开(公告)日：2022-10-13

申请号：US17849995

申请日：2022-06-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yao-Jen Chang ,  Chih-Chien Chi ,  Chen-Yuan Kao ,  Hung-Wen Su ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Jun-Yi Ruan

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L23/532 ,  H01L21/8238 ,  H01L27/092

摘要： A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US10163691B2

公开(公告)日：2018-12-25

申请号：US15707657

申请日：2017-09-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Cheng Shih ,  Chia Cheng Chou ,  Chung-Chi Ko

IPC分类号： H01L21/768 ,  H01L21/3105 ,  H01L21/311

摘要： A method of fabricating a semiconductor device includes forming a low-k dielectric layer over a substrate and depositing a cap layer over the low-k dielectric layer. A treatment process is performed to the cap layer. After the treatment process to the cap layer is performed, the low-k dielectric layer is etched to form a plurality of trenches using the cap layer as an etching mask.

公开(公告)号：US11676855B2

公开(公告)日：2023-06-13

申请号：US17094700

申请日：2020-11-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Jen Lo ,  Po-Cheng Shih ,  Syun-Ming Jang ,  Tze-Liang Lee

IPC分类号： H01L21/768 ,  H01L21/027 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20

CPC分类号： H01L21/76823 ,  G03F7/038 ,  G03F7/039 ,  G03F7/2004 ,  G03F7/2022 ,  H01L21/0274 ,  H01L21/76802 ,  H01L21/76877

摘要： A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

公开(公告)号：US20230163194A1

公开(公告)日：2023-05-25

申请号：US17648037

申请日：2022-01-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Bor Chiuan Hsieh ,  Tsai-Jung Ho ,  Po-Cheng Shih ,  Tze-Liang Lee

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L29/40

CPC分类号： H01L29/66515 ,  H01L29/401 ,  H01L29/7851 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795

摘要： A method includes forming a dummy gate stack over a semiconductor region, forming gate spacers on opposing sides of the dummy gate stack, forming a source/drain region on a side of the dummy gate stack, forming an inter-layer dielectric over the source/drain region, replacing the dummy gate stack with a replacement gate stack, recessing the replacement gate stack to form a recess between the gate spacers, depositing a liner extending into the recess, depositing a masking layer over the liner and extending into the recess, forming an etching mask covering a portion of the masking layer, and etching the inter-layer dielectric to form a source/drain contact opening. The source/drain region is underlying and exposed to the source/drain contact opening. A source/drain contact plug is formed in the source/drain contact opening. A gate contact plug extends between the gate spacers and electrically connecting to the replacement gate stack.

公开(公告)号：US11062901B2

公开(公告)日：2021-07-13

申请号：US16569791

申请日：2019-09-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia Cheng Chou ,  Po-Cheng Shih ,  Li Chun Te ,  Tien-I Bao

IPC分类号： H01L21/02 ,  H01L21/311 ,  H01L21/768 ,  C23C16/30 ,  H01L23/532 ,  H01L23/535

摘要： Embodiments described herein relate generally to methods for forming low-k dielectrics and the structures formed thereby. In some embodiments, a dielectric is formed over a semiconductor substrate. The dielectric has a k-value equal to or less than 3.9. Forming the dielectric includes using a plasma enhanced chemical vapor deposition (PECVD). The PECVD includes flowing a diethoxymethylsilane (mDEOS, C5H14O2Si) precursor gas, flowing an oxygen (O2) precursor gas; and flowing a carrier gas. A ratio of a flow rate of the mDEOS precursor gas to a flow rate of the carrier gas is less than or equal to 0.2.

公开(公告)号：US20210183646A1

公开(公告)日：2021-06-17

申请号：US17183807

申请日：2021-02-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia Cheng Chou ,  Po-Cheng Shih ,  Li Chun Te ,  Tien-I Bao

IPC分类号： H01L21/02 ,  H01L21/311 ,  H01L21/768 ,  C23C16/30 ,  H01L23/532 ,  H01L23/535

摘要： Embodiments described herein relate generally to methods for forming low-k dielectrics and the structures formed thereby. In some embodiments, a dielectric is formed over a semiconductor substrate. The dielectric has a k-value equal to or less than 3.9. Forming the dielectric includes using a plasma enhanced chemical vapor deposition (PECVD). The PECVD includes flowing a diethoxymethylsilane (mDEOS, C5H14O2Si) precursor gas, flowing an oxygen (O2) precursor gas; and flowing a carrier gas. A ratio of a flow rate of the mDEOS precursor gas to a flow rate of the carrier gas is less than or equal to 0.2.

公开(公告)号：US20210074581A1

公开(公告)日：2021-03-11

申请号：US17099263

申请日：2020-11-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Cheng Chou ,  Chih-Chien Chi ,  Chung-Chi Ko ,  Yao-Jen Chang ,  Chen-Yuan Kao ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Tze-Liang Lee ,  Jun-Yi Ruan

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/84 ,  H01L29/66 ,  H01L23/522 ,  H01L23/528 ,  H01L29/78

摘要： A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US09236294B2

公开(公告)日：2016-01-12

申请号：US14153831

申请日：2014-01-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd

发明人： Chia-Cheng Chou ,  Chung-Chi Ko ,  Po-Cheng Shih ,  Chih-Hung Sun ,  Kuang-Yuan Hsu ,  Joung-Wei Liou ,  Tze-Liang Lee

IPC分类号： H01L21/00 ,  H01L21/768 ,  H01L21/02

CPC分类号： H01L21/76868 ,  H01L21/02351 ,  H01L21/02354 ,  H01L21/3105 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76826

摘要： Embodiments of the disclosure provide a method for forming a semiconductor device structure. The method includes forming a dielectric layer over a semiconductor substrate. The method also includes applying a carbon-containing material over the dielectric layer. The method further includes irradiating the dielectric layer and the carbon-containing material with a light to repair the dielectric layer, and the light has a wavelength greater than about 450 nm.

摘要翻译： 本公开的实施例提供了一种用于形成半导体器件结构的方法。 该方法包括在半导体衬底上形成电介质层。 该方法还包括在电介质层上涂覆含碳材料。 该方法还包括用光照射介电层和含碳材料以修复电介质层，并且光具有大于约450nm的波长。

公开(公告)号：US09093265B2

公开(公告)日：2015-07-28

申请号：US14053727

申请日：2013-10-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Cheng Shih ,  Hui-Chun Yang ,  Chung-Chi Ko ,  Kuang-Yuan Hsu

IPC分类号： H01L21/02

CPC分类号： H01L21/02263 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02345 ,  H01L21/02348 ,  H01L21/67115 ,  H01L21/68771

摘要： One embodiment is a method for semiconductor processing. In this method, a precursor film is provided over a semiconductor substrate, where the precursor film is made of a structural former and porogen. Prior to cross-linking, the porogen is removed by exposure to UV radiation having one or more wavelengths in the range of 150 nm to 300 nm, while a temperature of 300° C. to 500° C. is applied to the semiconductor substrate. Meanwhile, a Argon:Helium flow rate of 80>Ar>10 slm, 80>He>10 slm is set for the ambient substrate environment where the ratio of Ar:He ranges from 0:1 to 1:0 by volume or molality.

摘要翻译： 一个实施例是用于半导体处理的方法。 在该方法中，前体膜设置在半导体衬底上，其中前体膜由结构形成剂和致孔剂制成。 在交联之前，通过暴露于具有150nm至300nm范围内的一个或多个波长的紫外线辐射来除去致孔剂，同时将温度为300℃至500℃的温度施加到半导体衬底。 同时，Ar：He的比例为0：1至1：0，其体积或摩尔比为Ar>氦流量80> Ar> 10 slm，80> He> 10 slm。