公开(公告)号：US20240187110A1

公开(公告)日：2024-06-06

申请号：US18419461

申请日：2024-01-22

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/80 ,  G02B6/42 ,  G11C5/04 ,  G11C5/06 ,  G11C5/14 ,  G11C11/42 ,  H04B10/516

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US20240176081A1

公开(公告)日：2024-05-30

申请号：US18432768

申请日：2024-02-05

申请人： Ayar Labs, Inc.

发明人： Chong Zhang ,  Roy Edward Meade

IPC分类号： G02B6/42 ,  G02B6/30 ,  G02B6/43 ,  H01L23/538 ,  H01L25/00 ,  H01L25/18 ,  H05K1/02

CPC分类号： G02B6/42 ,  G02B6/30 ,  G02B6/4214 ,  G02B6/4249 ,  G02B6/4274 ,  H01L23/5389 ,  H01L25/18 ,  H01L25/50 ,  H05K1/0274 ,  G02B6/428 ,  G02B6/43 ,  H05K2201/10121

摘要： A vertical integrated photonics chiplet assembly includes a package substrate and an external device connected to a top surface of the package substrate. A photonics chip is disposed within the package substrate The photonics chip includes optical coupling devices positioned at a top surface of the photonics chip. A plurality of conductive via structures are disposed within the package substrate in electrical connection with electrical circuits within the photonics chip. The plurality of conductive via structures are electrically connected through the package substrate to the external device. An opening is formed through the top surface of the substrate to expose a portion of the top surface of the photonics chip at which the optical coupling devices are positioned. An optical fiber array is disposed and secured within the opening such that a plurality of optical fibers of the optical fiber array optically couple to the optical coupling devices.

公开(公告)号：US11988881B2

公开(公告)日：2024-05-21

申请号：US18165278

申请日：2023-02-06

申请人： Ayar Labs, Inc.

发明人： John Fini ,  Anatol Khilo ,  Chen Sun ,  Pavan Bhargava ,  Chandarasekaran Ramamurthy

IPC分类号： G02B6/293 ,  G02B6/42 ,  H04B10/60

CPC分类号： G02B6/4215 ,  G02B6/29335 ,  G02B6/29338 ,  G02B6/2938 ,  G02B6/29395 ,  G02B6/4213 ,  H04B10/60 ,  G02B6/29343

摘要： A first portion of incoming light and a second portion of incoming light travel in opposite directions within a first optical waveguide. A ring resonator in-couples the first portion of incoming light and the second portion of incoming light from the first optical waveguide, such that the first portion of incoming light and the second portion of incoming light travel in opposite directions within the ring resonator. A second optical waveguide is disposed to in-couple the first portion of incoming light and the second portion of incoming light couple from the ring resonator, such that the first portion of incoming light and the second portion of incoming light travel in opposite directions within the second optical waveguide away from the ring resonator. One or more photodetector(s) are optically connected to receive the first portion of incoming light and the second portion of incoming light from the second optical waveguide.

公开(公告)号：US11916602B2

公开(公告)日：2024-02-27

申请号：US17175677

申请日：2021-02-14

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

IPC分类号： H04B10/00 ,  H04B10/80 ,  H04B10/516 ,  G11C5/04 ,  G11C5/06 ,  G11C11/42 ,  G02B6/42 ,  G11C5/14 ,  H04J14/00

CPC分类号： H04B10/80 ,  G02B6/4249 ,  G02B6/4274 ,  G11C5/04 ,  G11C5/06 ,  G11C5/141 ,  G11C11/42 ,  H04B10/516

摘要： A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals. The optical macro transmits the incoming electrical data signals through the electrical interface to the high-bandwidth memory interface.

公开(公告)号：US20240014904A1

公开(公告)日：2024-01-11

申请号：US18471139

申请日：2023-09-20

申请人： Ayar Labs, Inc.

发明人： Chen Sun ,  Roy Edward Meade ,  Mark Wade ,  Alexandra Wright ,  Vladimir Stojanovic ,  Rajeev Ram ,  Milos Popovic ,  Derek Van Orden ,  Michael Davenport

IPC分类号： H04B10/50 ,  H01S5/40 ,  H01S5/026 ,  H04B10/80 ,  H01S5/02325

CPC分类号： H04B10/504 ,  H01S5/4012 ,  H01S5/4087 ,  H01S5/0268 ,  H04B10/801 ,  H04B10/506 ,  H01S5/02325 ,  H01S5/02476

摘要： An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.

公开(公告)号：US11867944B2

公开(公告)日：2024-01-09

申请号：US17701072

申请日：2022-03-22

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Chen Sun ,  Shahab Ardalan ,  John Fini ,  Forrest Sedgwick

IPC分类号： G02B6/13 ,  G02B6/12 ,  H01L21/66 ,  G01M11/00

CPC分类号： G02B6/12004 ,  G01M11/31 ,  G02B6/13 ,  H01L22/20 ,  H01L22/30 ,  G02B2006/12107 ,  G02B2006/12121 ,  G02B2006/12145 ,  G02B2006/12147 ,  G02B2006/12164

摘要： An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.

公开(公告)号：US11822119B2

公开(公告)日：2023-11-21

申请号：US18168555

申请日：2023-02-13

申请人： Ayar Labs, Inc.

发明人： John Fini ,  Vladimir Stojanovic ,  Chen Sun ,  Derek van Orden ,  Mark Taylor Wade

IPC分类号： G02B6/12 ,  G02B6/293 ,  G02B6/125 ,  G02B6/43 ,  H04B10/25

CPC分类号： G02B6/12019 ,  G02B6/125 ,  G02B6/12016 ,  G02B6/29335 ,  G02B6/43 ,  G02B2006/12107 ,  G02F2203/15 ,  H04B10/25

摘要： An electro-optical chip includes an optical input port, an optical output port, and an optical waveguide having a first end optically connected to the optical input port and a second end optically connected to the optical output port. The optical waveguide includes one or more segments. Different segments of the optical waveguide extends in either a horizontal direction, a vertical direction, a direction between horizontal and vertical, or a curved direction. The electro-optical chip also includes a plurality of optical microring resonators is positioned along at least one segment of the optical waveguide. Each microring resonator of the plurality of optical microring resonators is optically coupled to a different location along the optical waveguide. The electro-optical chip also includes electronic circuitry for controlling a resonant wavelength of each microring resonator of the plurality of optical microring resonators.

公开(公告)号：US20230343655A1

公开(公告)日：2023-10-26

申请号：US18346555

申请日：2023-07-03

申请人： Ayar Labs, Inc.

发明人： Roy Edward Meade ,  Anatol Khilo ,  Forrest Sedgwick ,  Alexandra Wright

IPC分类号： H01L21/66 ,  H04B10/073 ,  G02B6/12 ,  G02B6/13 ,  G01R31/3185

CPC分类号： H01L22/30 ,  H04B10/0731 ,  G02B6/12 ,  G02B6/13 ,  G01R31/318511 ,  G02B6/0028

摘要： A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.

公开(公告)号：US20230341628A1

公开(公告)日：2023-10-26

申请号：US18333434

申请日：2023-06-12

申请人： Ayar Labs, Inc.

发明人： John Fini ,  Derek Van Orden ,  Mark Wade

IPC分类号： G02B6/293 ,  G02B6/12

CPC分类号： G02B6/2934 ,  G02B6/12007

摘要： A photonic system includes a passive optical cavity and an optical waveguide. The passive optical cavity has a preferred radial mode for light propagation within the passive optical cavity. The preferred radial mode has a unique light propagation constant within the passive optical cavity. The optical waveguide is configured to extend past the passive optical cavity such that at least some light propagating through the optical waveguide will evanescently couple into the passive optical cavity. The passive optical cavity and the optical waveguide are collectively configured such that a light propagation constant of the optical waveguide substantially matches the unique light propagation constant of the preferred radial mode within the passive optical cavity.

公开(公告)号：US11799554B2

公开(公告)日：2023-10-24

申请号：US17866482

申请日：2022-07-16

申请人： Ayar Labs, Inc.

发明人： Chen Sun ,  Roy Edward Meade ,  Mark Wade ,  Alexandra Wright ,  Vladimir Stojanovic ,  Rajeev Ram ,  Milos Popovic ,  Derek Van Orden ,  Michael Davenport

IPC分类号： H04B10/50 ,  H01S5/40 ,  H01S5/026 ,  H04B10/80 ,  H01S5/02325 ,  H01S5/024 ,  H01S5/50 ,  G02B6/42

CPC分类号： H04B10/504 ,  H01S5/0268 ,  H01S5/02325 ,  H01S5/4012 ,  H01S5/4087 ,  H04B10/506 ,  H04B10/801 ,  G02B6/42 ,  H01S5/02476 ,  H01S5/50

摘要： An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.