Abstract:
An apparatus for comparing inputted signals by removing an offset voltage during adjusting an output impedance of a semiconductor memory device, includes a voltage comparator for comparing a first input signal applied to its positive input node with a second input signal applied to its negative input node to output a first output signal to its positive output node and its second output signal to a negative output node; a switched capacitive unit for removing an offset voltage occurred in the positive input node, the negative input node, the positive output node and the negative output node of the voltage comparator; and a latch unit for latching the first output signal and the second output signal.
Abstract:
A circuit for controlling a driver of a semiconductor memory apparatus includes at least one driving unit in which impedance is set according to a code value, an impedance adjusting unit that outputs a first code and a second code for setting the impedance of the at least one driving unit, a driving reinforcing control unit that outputs an adjustment code for a time corresponding to timing data, and a driving reinforcing unit that outputs a first reinforcing code and a second reinforcing code obtained by adjusting the first code and the second code using the adjustment code, such that a driving capability of the at least one driving unit is reinforced.
Abstract:
A data output driving circuit includes a plurality of driving units that are set to have different impedance values from one another, and the number of driving units is less than the number of a plurality of required driving impedance values such that the driving units can obtain the plurality of required driving impedance values by a combination thereof, and a driving control unit that independently controls the operation of the plurality of driving units so as to obtain the plurality of driving impedance values required.
Abstract:
An on die termination (ODT) control device includes a latency block for buffering an ODT control signal to output a latency control signal by selecting one of a plurality of intermediate control signals, which are generated by sequentially delaying the buffered ODT control signal in synchronization with an internal clock, based on first latency information; an enable signal generation block for comparing a first control signal with a second control signal in response to the latency control signal to thereby produce an ODT enable signal based on the compared result; and an ODT block for controlling a termination impedance based on the ODT enable signal.
Abstract:
A semiconductor memory device includes a reference signal generating unit for generating a reference signal; a comparing unit for comparing the reference signal with a test signal applied to a test pad to output an adjusted value after adjusting the adjusted value until the test signal is equal to the reference signal; an impedance measuring unit for measuring an impedance of the test pad based on the adjusted value to output the test signal; an impedance adjusting unit for adjusting an impedance of a data I/O pad to have an impedance value corresponding to the adjusted value outputted when the test signal is equal to the reference signal; an impedance control unit for controlling the comparing unit so that the adjusted value is outputted when the test signal is equal to the reference signal; and a reference signal control unit for adjusting a voltage level of the reference signal.
Abstract:
A DLL voltage supply device for use in a semiconductor memory device includes: a bandgap voltage generating means for generating a bandgap voltage by using an external power supply voltage; a voltage level shifter for increasing a voltage level of the bandgap voltage in order to output an increased bandgap voltage as a DLL voltage; and a voltage level keep means for outputting the external power supply voltage as the DLL voltage if the increased bandgap voltage is lower than a predetermined voltage level.
Abstract:
An LCD display device in which the gate lines are controlled by a gate circuit part that outputs gate signals to the gate lines. A first signal wiring is formed adjacent to the gate circuit part and transmits a starting signal, which initiates an operation of the gate circuit part, to the gate circuit part. A second signal wiring is formed at a side of the first signal wiring and transmits a control signal, which controls an output of the gate circuit part, to the gate circuit part. A first connection wiring is electrically connected between the gate circuit part and the second signal wiring. The first connection wiring is intersected with the first signal wiring. Therefore, a resistance of the wiring is increased to protect the gate circuit from static electricity.
Abstract:
An apparatus and method for trimming a picture in a digital camera are provided. A trimming apparatus in a digital camera having an external window includes a black bar determiner which determines a size of a black bar used to cover a part of the external window based on ratio information of a printing paper received from a printer; a picture changing unit which changes the size or position of a picture, or both the size and position of the picture, based on a user input signal to create a display picture on the external window; and a coordinate determiner which determines coordinates of the display picture based on the display picture and the size of the black bar. The trimming apparatus and a trimming method make it possible to fix an external window of a digital camera and move a picture, thereby providing a user with an accurate way to select a trimming picture.
Abstract:
Embodiments of the present invention relate to an apparatus (i.e. an automatic teller machine) comprising an optical sensor. The optical sensor is configured to detect thickness of paper. Advantages of some embodiments of the present invention are that by determining a thickness of paper, it can be confirmed that two pieces of paper are not stuck together. For example, if two substantially identical pieces of paper are stuck together, then their thickness will be approximately twice the thickness of a single sheet. Accordingly, upon detection of two or more sheets of paper stuck together, a device, that automatically handles paper, may cause the sheets of paper to be separated.
Abstract:
A delay locked loop features a phase comparator. The phase comparator compares a phase of a reference clock signal obtained by dividing a buffered external clock signal with a phase of a feedback clock signal considering delay time of delay lines and inside circuits, and controls a shift register for controlling the delay lines in response not only a rising clock signal outputted from a clock buffer but also a falling clock signal depending on the comparison result, thereby rapidly locking an initial phase and tracking the phase in spite of fast delay variations by external noises.