Amplification phase correction in a pulse burst
    91.
    发明授权
    Amplification phase correction in a pulse burst 有权
    脉冲脉冲串中的放大相位校正

    公开(公告)号:US09479122B2

    公开(公告)日:2016-10-25

    申请号:US14471568

    申请日:2014-08-28

    Inventor: Chang Ru Zhu

    Abstract: An apparatus having an amplifier and a correction circuit is disclosed. The amplifier may be configured to amplify an intermediate signal to generate an output signal. The amplifier is generally a microwave frequency power amplifier. The correction circuit may be configured to (i) generate a control signal based on a plurality of characteristics of the amplifier, and (ii) adjust a plurality of phases of a plurality of pulses in a pulse burst to generate the intermediate signal. The adjusting may be in response to the control signal. The pulse burst is generally received in an input signal. The phases of the pulses as adjusted in the intermediate signal generally cancel a plurality of phase errors induced by the amplifier in the pulses.

    Abstract translation: 公开了一种具有放大器和校正电路的装置。 放大器可以被配置为放大中间信号以产生输出信号。 放大器通常是微波频率功率放大器。 校正电路可以被配置为(i)基于放大器的多个特性产生控制信号,以及(ii)调整脉冲串中的多个脉冲的多个相位以产生中间信号。 调整可以响应于控制信号。 通常在输入信号中接收脉冲串。 在中间信号中调节的脉冲的相位通常消除由脉冲中的放大器感应的多个相位误差。

    Transmit/receive module including gate/drain switching control
    92.
    发明授权
    Transmit/receive module including gate/drain switching control 有权
    发送/接收模块包括门/漏切换控制

    公开(公告)号:US09455700B1

    公开(公告)日:2016-09-27

    申请号:US14477186

    申请日:2014-09-04

    CPC classification number: H04B1/44 H03F1/0277 H03F3/245 H03F2200/451

    Abstract: An integrated circuit includes a transmit/receive (T/R) circuit and a gate/drain bias control circuit. The transmit/receive (T/R) circuit may be configured to transmit and receive radio frequency (RF) signals. The gate/drain bias control circuit may be configured to enable or disable internal gate switching of one or more amplifiers of the transmit/receive (T/R) circuit in response to a first control signal. When the internal gate switching is disabled the one or more amplifiers of the transmit/receive (T/R) circuit are enabled and disabled solely by external drain switching.

    Abstract translation: 集成电路包括发射/接收(T / R)电路和栅极/漏极偏置控制电路。 发射/接收(T / R)电路可以被配置为发送和接收射频(RF)信号。 栅极/漏极偏置控制电路可以被配置为响应于第一控制信号而允许或禁止发射/接收(T / R)电路的一个或多个放大器的内部栅极切换。 当禁止内部门极开关时,发射/接收(T / R)电路的一个或多个放大器仅通过外部漏极开关使能和禁止。

    BALANCED MIXER
    93.
    发明申请

    公开(公告)号:US20250070716A1

    公开(公告)日:2025-02-27

    申请号:US18236093

    申请日:2023-08-21

    Abstract: Systems, circuits, and methods for mixing signals are provided. An illustrative circuit may include mixer circuitry including multiple inputs and at least one output, where the multiple inputs are connected across a local oscillator. The circuit may further include a terminal Radio Frequency (RF) output circuitry that is isolated from the local oscillator, where the at least one output of the mixer circuitry is directly connected to an input of the terminal RF output circuitry. The circuit may further include terminal Intermediate Frequency (IF) output circuitry that is isolated from the local oscillator, where the at least one output of the mixer circuitry is directly connected to an input of the terminal IF output circuitry.

    BIASING CIRCUIT FOR RADIO FREQUENCY AMPLIFIER

    公开(公告)号:US20250038714A1

    公开(公告)日:2025-01-30

    申请号:US18358394

    申请日:2023-07-25

    Abstract: A biasing circuit for biasing an output transistor in a radio frequency (RF) amplifier includes a first field-effect transistor (FET) monolithically integrated with the output transistor, the first FET being connected to the output transistor in a current mirror configuration, such that a gate-to-source voltage of the first FET is the same as a gate-to-source voltage of the output transistor, and a drain current in the first FET is matched to a drain current in the output transistor and scaled proportionally according to a size of the first FET relative to a size of the output transistor. The biasing circuit further includes a voltage divider integrated with the first FET and connected to a current source, the voltage divider being configured to generate a voltage that is substantially independent of process, voltage and/or temperature variations for controlling the drain current in the first FET.

    ANGULAR DEVIATION TRACKING AND DETECTOR DEVICE FOR OPTICAL SYSTEMS

    公开(公告)号:US20250035732A1

    公开(公告)日:2025-01-30

    申请号:US18783005

    申请日:2024-07-24

    Abstract: An angular deviation optical tracking and detector device for use in optical systems such as a FSO communication systems—among others. The angular deviation optical tracking and detector device includes position sensor elements that are configured to detect any misalignment of incoming/received light and an optical tunnel structure coupled with a detector array to determine the angular deviation. The optical tracking and detector device includes a position sensor having an optical aperture configured to allow a portion of incoming light to pass through the position sensor; a plurality of position receivers positioned adjacent to the optical aperture, the plurality of position receivers configured to sense portions of the incoming light; and an optical detector array configured to detect portions of the incoming light that passes through the position sensor aperture and optical tunnel. Angular deviation may be determined from diode array readout of illuminated individual diodes.

    Optimal equalization partitioning
    98.
    发明授权

    公开(公告)号:US12126381B2

    公开(公告)日:2024-10-22

    申请号:US17894966

    申请日:2022-08-24

    Inventor: Ryan Latchman

    CPC classification number: H04B10/2543 H04B10/0775 H04B10/25073

    Abstract: A communication interface comprising a host with non-linear equalizers configured to perform non-linear equalization. Also part of the interface is a host to optic module channel electrically connecting the host to an optic module and the optic module. The optic module comprises a transmitter and a receiver. The transmitter includes a linear equalizer and an electrical to optical module configured to convert the equalized signal from the driver to an optical signal, and transmit the optical signal over a fiber optic cable, such that the transmitter does not perform non-linear processing. The receiver includes a photodetector, configured to convert the received optic signal to a received electrical signal, and a linear amplifier configured to perform linear amplification on the received electrical signal. A driver sends the amplified received signal over an optic module to host channel, such that the receive does not perform non-linear processing.

    Error detection and compensation for a multiplexing transmitter

    公开(公告)号:US12113538B2

    公开(公告)日:2024-10-08

    申请号:US17027539

    申请日:2020-09-21

    Abstract: Various aspects provide for error detection and compensation for a multiplexing transmitter. For example, a system can include an error detector circuit and a duty cycle correction circuit. The error detector circuit is configured to measure duty cycle error for a clock associated with a transmitter to generate error detector output based on a clock pattern for output generated by the transmitter in response to a defined bit pattern. The duty cycle correction circuit is configured to adjust the clock associated with the transmitter based on the error detector output. Additionally or alternatively, the error detector circuit is configured to measure quadrature error between an in-phase clock and a quadrature clock in response to the defined bit pattern. Additionally or alternatively, the system can include a quadrature error correction circuit configured to adjust phase shift between the in-phase clock and the quadrature clock based on quadrature error.

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