公开(公告)号：US12230123B2

公开(公告)日：2025-02-18

申请号：US17550972

申请日：2021-12-14

Applicant: Micron Technology, Inc.

Inventor： Pin-Chou Chiang ,  Michele Piccardi ,  Theodore T. Pekny

IPC: G08B29/06 ,  G08B29/12 ,  H03H11/12 ,  G04F10/04 ,  H03H7/01

Abstract: A system and a memory device including a driver circuit, to perform first operations including driving a resistor-capacitor (RC) sensor circuit of an electronic device to a drive voltage using a representative copy of a current that drives an electronic circuit line of the electronic device. The system and memory device including the RC sensor circuit, coupled to the driver circuit, to perform second operations including determining a first sample voltage by sampling a first representative voltage generated at the RC sensor circuit, and determining a second sample voltage by sampling a second representative voltage generated at the RC sensor circuit. The ratio of the first sample voltage and the second sample voltage is indicative of an RC time constant of the electronic circuit line.

公开(公告)号：US12229327B2

公开(公告)日：2025-02-18

申请号：US17939640

申请日：2022-09-07

Applicant: Micron Technology, Inc.

Inventor： Sourin Sarkar

IPC: G06F21/79

Abstract: A system for providing forensic tracing of memory device content erasure and tampering is disclosed. The system uses a special command that enables forensic tracing in a secure memory device. Once the forensic tracing is enabled, firmware of the memory device tracks the data stored on the memory device. The command specifies whether the tracking and tracing is for the entire memory device or for a region of the memory device. The firmware confirms that the forensic tracing is enabled, and a target protection region is defined. Once an authenticated command for an operation to access, modify, or erase data of the memory device is received from a host, the system enables the operation to proceed. The system creates a trace of the operation and the metadata of the target region that is modified within a secure memory region of the memory device that is not addressable by the host device.

公开(公告)号：US12229060B2

公开(公告)日：2025-02-18

申请号：US17554400

申请日：2021-12-17

Applicant: Micron Technology, Inc.

Inventor： Dmitri Yudanov

IPC: G06F13/16 ,  G06F13/40

Abstract: A memory module having a plurality of memory chips, at least one controller (e.g., a central processing unit or special-purpose controller), and at least one interface device configured to communicate input and output data for the memory module. The input and output data bypasses at least one processor (e.g., a central processing unit) of a computing device in which the memory module is installed. And, the at least one interface device can be configured to communicate the input and output data to at least one other memory module in the computing device. Also, the memory module can be one module in a plurality of memory modules of a memory module system.

公开(公告)号：US12229024B2

公开(公告)日：2025-02-18

申请号：US18608652

申请日：2024-03-18

Applicant: Micron Technology, Inc.

Inventor： Robert Mason ,  Scott A. Stoller ,  Pitamber Shukla ,  Kenneth W. Marr ,  Chi Ming Chu ,  Hossein Afkhami

IPC: G06F11/14 ,  G06F9/30

Abstract: Exemplary methods, apparatuses, and systems including memory self-recovery management to correct failures due to soft-error rate events. The self-recovery manager detects a failure of a memory device. The self-recovery manager retrieves a set of register values from the memory device. The self-recovery manager stores the set of register values from the memory device. The self-recovery manager issues a reset command to the memory device, the reset command including generating a re-initialized set of register values. The self-recovery manager compares the set of register values with the re-initialized set of register values. The self-recovery manager triggering a self-recovery attempt using the comparison of the set of register values with the re-initialized set of register values.

公开(公告)号：US12229000B2

公开(公告)日：2025-02-18

申请号：US18207525

申请日：2023-06-08

Applicant: Micron Technology, Inc.

Inventor： Kishore Kumar Muchherla ,  Shane Nowell ,  Mustafa N. Kaynak ,  Sampath K. Ratnam ,  Peter Feeley ,  Sivagnanam Parthasarathy ,  Devin M. Batutis ,  Xiangang Luo

IPC: G06F11/00 ,  G06F11/07

Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including detecting a read error with respect to data residing in a first block of the memory device, wherein the first block is associated with a voltage offset bin; determining a most recently performed error-handling operation performed on a second block associated with the voltage offset bin; and performing the error-handling to recover the data.

公开(公告)号：US20250056937A1

公开(公告)日：2025-02-13

申请号：US18929239

申请日：2024-10-28

Applicant: Micron Technology, Inc.

Inventor： Vladimir Odnoblyudov ,  Scott D. Schellhammer ,  Jeremy S. Frei

IPC: H01L33/52 ,  H01L21/56 ,  H01L21/683 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L33/00 ,  H01L33/20 ,  H01L33/44 ,  H01L33/62 ,  H01S5/02 ,  H10K50/84 ,  H10K50/844 ,  H10K71/00

Abstract: Etched trenches in a bond material for die singulation, and associated systems and methods are disclosed. A method for solid state transducer device singulation in accordance with one embodiment includes forming a plurality of trenches by etching through a metallic bond material forming a bond between a carrier substrate and a plurality of the dies and singulating the carrier substrate along the trenches to separate the dies. In particular embodiments, the trenches extend into the carrier substrate. In further particular embodiments, the dies are at least partially encapsulated in a dielectric material.

公开(公告)号：US20250054560A1

公开(公告)日：2025-02-13

申请号：US18750246

申请日：2024-06-21

Applicant: Micron Technology, Inc.

Inventor： Jonathan D. Harms ,  Jonathan J. Strand ,  Sukneet Singh Basuta ,  Shashank Bangalore Lakshman

IPC: G11C29/50 ,  G11C11/22

Abstract: Methods, systems, and devices for imprint recovery for memory cells are described. In some cases, memory cells may become imprinted, which may refer to conditions where a cell becomes predisposed toward storing one logic state over another, resistant to being written to a different logic state, or both. Imprinted memory cells may be recovered using a recovery or repair process that may be initiated according to various conditions, detections, or inferences. In some examples, a system may be configured to perform imprint recovery operations that are scaled or selected according to a characterized severity of imprint, an operational mode, environmental conditions, and other factors. Imprint management techniques may increase the robustness, accuracy, or efficiency with which a memory system, or components thereof, can operate in the presence of conditions associated with memory cell imprinting.

公开(公告)号：US20250054531A1

公开(公告)日：2025-02-13

申请号：US18930833

申请日：2024-10-29

Applicant: Micron Technology, Inc.

Inventor： Tong Liu ,  Daniele Vimercati

IPC: G11C11/22

Abstract: Systems and methods are related to a memory device including a plate line. The memory device also includes a pair of ferroelectric layers implementing a pair of memory cells and coupled to opposite sides of the plate line. The memory device further includes a pair of digit lines each coupled to a respective ferroelectric layer of the pair of ferroelectric layers. The memory device also includes a sense amplifier coupled to the pair of digit lines and configured to sense and amplify voltages received at the digit lines from the respective memory cells. The sense amplifier includes a threshold voltage compensated latch that includes multiple p-channel transistors and is configured to compensate for process, voltage, or temperature variation mismatches between the threshold voltages of the multiple p-channel transistors.

公开(公告)号：US20250053630A1

公开(公告)日：2025-02-13

申请号：US18933096

申请日：2024-10-31

Applicant: Micron Technology, Inc.

Inventor： Bhumika Chhabra ,  Carla L. Christensen ,  Radhika Viswanathan ,  Zahra Hosseinimakarem

IPC: G06F21/32 ,  G06F21/60 ,  G06V40/12 ,  G06V40/16 ,  G06V40/18 ,  G09G3/3208

Abstract: Methods, apparatuses, and non-transitory machine-readable media for displaying information and/or images on a display of a computing device based on received data. Apparatuses can include a display screen, a memory resource, a recognition sensor, and a controller. An example controller can receive data and activate information and/or images on a display screen based in part on the received data. In another example, a method can include storing recognition data in a memory resource, receiving primary recognition data, comparing the primary recognition data to the stored recognition data, and activating the display screen for a viewing angle responsive to authentication of the primary recognition data through the comparison of the primary recognition data and the stored recognition data.

公开(公告)号：US20250053512A1

公开(公告)日：2025-02-13

申请号：US18777466

申请日：2024-07-18

Applicant: Micron Technology, Inc.

Inventor： Robert M. Walker

IPC: G06F12/06

Abstract: Mapping addresses to banks can include receiving a plurality of row bits, a plurality of column bits, and a plurality of bank bits and generating a rank bit from a bank bit from the plurality of bank bits. Updated bank bits can be generated by removing the bank bit from the plurality of bank bits. The plurality of row bits, the plurality of column bits, the rank bit, and the updated bank bits can be provided to the controller to access a plurality of banks of the memory device.