摘要:
A variable valve timing control device includes a housing member, a rotor member assembled on the housing member so as to rotate relative thereto, a vane provided on the rotor member, a fluid pressure chamber divided into an advanced angle chamber and a retarded angle chamber by the vane, a lock mechanism for restricting or allowing a relative rotation between the housing member and the rotor member by a lock member, a fluid pressure circuit for controlling an operation fluid to be supplied to or discharged from the advanced angle chamber, the retarded angle chamber, and the lock mechanism, a plate provided on the housing member and integrally rotating with the housing member, an engaging groove formed on the plate, and a contacting member arranged in the engaging groove so as to rotate integrally with the plate and engaging with a coupling member so as to be assembled thereon.
摘要:
In a decompressed atmosphere and a heating atmosphere, a vapor of a hafnium organic compound is reacted with, e.g., a disilane gas in a reacting vessel, so as to form a hafnium silicate film on a silicon film. By reacting a dichlorosilane gas with a dinitrogen oxide gas, a silicon oxide film as a barrier layer is laminated on the hafnium silicate film. A polysilicon film as a gate electrode is formed on the silicon oxide film.
摘要:
A method of using a film formation apparatus for a semiconductor process includes processing by a cleaning gas a by-product film deposited on an inner surface of a reaction chamber of the film formation apparatus. This step is arranged to supply the cleaning gas into the reaction chamber, and set an interior of the reaction chamber at a first temperature and a first pressure. The by-product film mainly contains a high-dielectric-constant material. The cleaning gas contains chlorine without containing fluorine. The first temperature and the first pressure are set to activate chlorine in the cleaning gas.
摘要:
In a capacitor of an MIM (Metal-Insulator-Metal) structure, a silicon-containing high dielectric film (e.g., a hafnium silicate film) containing a silicon atom, as well as a silicon-free high dielectric film (e.g., a tantalum oxide film) containing no silicon atom is interposed between a lower electrode film and an upper electrode film which are made of metal or metal compound. By adding the silicon-containing high dielectric film, a leak current can be suppressed and the change in capacitor capacity accompanied with the change in applied voltage can be reduced.
摘要:
A valve timing control device includes a rotation member for opening and closing values, a rotation transmitting member rotatably mounted on the rotation member, a fluid chamber defined between the rotation member and the rotation transmitting member, a vane fitted into a vane groove formed on the rotation member or the rotation transmitting member so as to divide the fluid chamber into a advance angle pressure chamber and a retard angle pressure chamber, the vane groove having contacting portions contacted with the vane and an elastic member disposed between the vane and the rotation member or the rotation transmitting member, wherein the radial length between the bottom portion of the vane groove and a bottom portion side end portion of the contacting portion is larger than a radial length between the bottom portion of the vane groove and an engaging portion of the vane engaged with the elastic member.
摘要:
A data transmission system includes control units connected to a network line and various sensors. Each of the control units includes an ID code comparing/processing section. In each of the ID code comparing/processing sections, multiplex communication control units, FIFO memory, CPU, main register and data extracting circuit are provided. Each of the multiplex communication control units receives an ID code extracted from a data frame transmitted via the network line by the data extracting circuit and checks whether the received ID code coincides with preset ID codes or not. The FIFO memory receives and holds the ID code in response to a coincidence signal from the multiplex communication control units and outputs a signal indicating that the ID code is held. The CPU detects that an ID code attached to main data necessary in the ID code comparing/processing section is input from the network line in response to a signal indicating that the ID code is held, processes main data stored in the main register corresponding to the ID code held in the FIFO memory.
摘要:
There is disclosed a field effect transistor having a channel layer, an electron supply layer, and a spacer layer formed between the channel layer and the electron supply layer. The spacer layer has a thickness for spatially separating a two-dimensional electron gas from donor ions in the electron supply layer, and for forming the two-dimensional electron gas in the channel layer by the Coulomb force of the donor ions. The spacer layer material has better high frequency characteristics than that of the electron supply layer.
摘要:
The invention provides a FET by forming a channel layer in layer including "n" type impurity at high concentration, which is sandwiched by a first semiconductor layer and a second semiconductor layer lightly doped with impurity. Therefore even when electrons in the channel layer obtain high energy, the electrons in this arrangement rush out essentially to the second semiconductor layer excelling in electron carrying characteristic, thus a travelling speed of the electrons in the channel layer is not lowered. Furthermore the channel layer being formed in layer and allowed to include impurity at high concentration, the current drive capability can be improved.
摘要:
A buffer layer, a first undoped layer, a first active layer and second undoped layer, a second active layer, a third undoped layer, a cap layer and contact layers are epitaxially grown on a semiconductor substrate in the stated order. A gate electrode is formed in a recess etched groove which formed in the center and reaches the cap layer through the contact layers. A drain electrode and a source electrode are formed on the contact layers and on both sides of the gate electrode.
摘要:
There is disclosed an FET having a high drain breakdown voltage and a short gate length comprising an active layer 2 formed on a surface layer of a semiconductor substrate 1; a highly doped impurity source region 4 and highly doped impurity drain region 4 formed in the surface layer of the semiconductor substrate 1 to sandwich the active layer 2; an insulation film 5 formed on the highly doped impurity source region 4; a gate electrode 8 formed on the active layer 2 and the insulation film 5 while maintaining a constant distance 1.sub.GD from the highly doped impurity drain region 4; and a source electrode 6 and a drain electrode 7 formed on the highly doped impurity source region 4 and the highly doped impurity drain region 4, respectively.