利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

109 条记录 (耗时 0.038 秒)

    Strained silicon-on-silicon by wafer bonding and layer transfer
    95.
    发明授权
    Strained silicon-on-silicon by wafer bonding and layer transfer 有权
    通过晶片接合和层转移来应变硅上硅

    公开(公告)号：US07495266B2

    公开(公告)日：2009-02-24

    申请号：US10869814

    申请日：2004-06-16

    申请人： David M. Isaacson ,  Eugene A. Fitzgerald

    发明人： David M. Isaacson ,  Eugene A. Fitzgerald

    IPC分类号： H01L31/0328

    CPC分类号： H01L21/187

    摘要： A semiconductor-based structure includes first and second layers bonded directly to each other at an interface. Parallel to the interface, the lattice spacing of the second layer is different than the lattice spacing of the first layer. The first and second layers are each formed of essentially the same semiconductor. A method for making a semiconductor-based structure includes providing first and second layers that are formed of essentially the same semiconductor. The first and second layers have, respectively, first and second surfaces. The second layer has a different lattice spacing parallel to the second surface than the lattice spacing of the first layer parallel to the first surface. The method includes contacting the first and second surfaces, and annealing to promote direct atomic bonding between the first and second layers.

    摘要翻译： 基于半导体的结构包括在界面处彼此直接键合的第一和第二层。 平行于界面，第二层的晶格间距不同于第一层的晶格间距。 第一层和第二层各自由基本上相同的半导体形成。 制造基于半导体的结构的方法包括提供由基本上相同的半导体形成的第一和第二层。 第一和第二层分别具有第一和第二表面。 第二层具有与第一层平行于第一表面的晶格间隔平行于第二表面的不同晶格间距。 该方法包括使第一和第二表面接触，退火以促进第一和第二层之间的直接原子结合。

    Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers
    96.
    发明授权
    Method of fabricating a semiconductor structure that includes transferring one or more material layers to a substrate and smoothing an exposed surface of at least one of the material layers 有权
    制造半导体结构的方法，其包括将一个或多个材料层转移到基底并使至少一个材料层的暴露表面平滑

    公开(公告)号：US07348259B2

    公开(公告)日：2008-03-25

    申请号：US11028248

    申请日：2005-01-03

    申请人： Zhiyuan Cheng ,  Eugene A. Fitzgerald ,  Dimitri A. Antoniadis

    发明人： Zhiyuan Cheng ,  Eugene A. Fitzgerald ,  Dimitri A. Antoniadis

    IPC分类号： H01L21/461

    CPC分类号： H01L21/76256 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/30608

    摘要： A method of fabricating a semiconductor structure. According to one aspect of the invention, on a first semiconductor substrate, a first compositionally graded Si1-xGex buffer is deposited where the Ge composition x is increasing from about zero to a value less than about 20%. Then a first etch-stop Si1-yGey layer is deposited where the Ge composition y is larger than about 20% so that the layer is an effective etch-stop. A second etch-stop layer of strained Si is then grown. The deposited layer is bonded to a second substrate. After that the first substrate is removed to release said first etch-stop S1-yGey layer. The remaining structure is then removed in another step to release the second etch-stop layer. According to another aspect of the invention, a semiconductor structure is provided. The structure has a layer in which semiconductor devices are to be formed. The semiconductor structure includes a substrate, an insulating layer, a relaxed SiGe layer where the Ge composition is larger than approximately 15%, and a device layer selected from a group consisting of, but not limited to, strained-Si, relaxed Si1-yGey layer, strained Si1-zGez layer, Ge, GaAs, III-V materials, and II-VI materials, where Ge compositions y and z are values between 0 and 1.

    摘要翻译： 一种制造半导体结构的方法。 根据本发明的一个方面，在第一半导体衬底上沉积第一组分梯度的Si 1-x N Ge x N x缓冲层，其中Ge组合物x从约 零到小于约20％的值。 然后沉积第一蚀刻停止Si 1-y Ge层，其中Ge组分y大于约20％，使得该层是有效的蚀刻停止 。 然后生长第二蚀刻停止层的应变Si。 沉积层结合到第二衬底。 之后，移除第一衬底以释放所述第一蚀刻停止层1-y层。 然后在另一步骤中除去剩余的结构以释放第二蚀刻停止层。 根据本发明的另一方面，提供一种半导体结构。 该结构具有要形成半导体器件的层。 半导体结构包括衬底，绝缘层，Ge组分大于约15％的弛豫SiGe层，以及选自但不限于应变Si，弛豫Si

    Structure and method for a high-speed semiconductor device having a Ge channel layer
    98.
    发明授权
    Structure and method for a high-speed semiconductor device having a Ge channel layer 有权
    具有Ge沟道层的高速半导体器件的结构和方法

    公开(公告)号：US07301180B2

    公开(公告)日：2007-11-27

    申请号：US10173986

    申请日：2002-06-18

    申请人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

    发明人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

    IPC分类号： H01L31/0328

    CPC分类号： H01L29/78696 ,  H01L29/1054 ,  H01L29/78684

    摘要： The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate with a Ge content between 50-95%, and a strained Ge channel formed on the virtual substrate. A gate structure is formed upon the strained Ge channel, whereupon a MOSFET is formed with increased performance over bulk Si. In another embodiment of the invention, a semiconductor structure comprising a relaxed Ge channel layer and a virtual substrate, wherein the relaxed Ge channel layer is disposed above the virtual substrate. In a further aspect of the invention, a relaxed Ge channel MOSFET is provided. The method includes providing a relaxed virtual substrate with a Ge composition of approximately 100% and a relaxed Ge channel formed on the virtual substrate.

    摘要翻译： 本发明提供包括应变Ge沟道层的半导体结构和设置在应变Ge沟道层上的栅极电介质。 在本发明的一个方面，提供了应变的Ge沟道MOSFET。 应变Ge沟道MOSFET包括Ge含量在50-95％之间的弛豫SiGe虚拟衬底和形成在虚拟衬底上的应变Ge沟道。 在应变Ge通道上形成栅极结构，于是形成具有在体积Si上增加的性能的MOSFET。 在本发明的另一实施例中，包括松弛的Ge沟道层和虚拟衬底的半导体结构，其中放宽的Ge沟道层设置在虚拟衬底之上。 在本发明的另一方面，提供了一种放宽的Ge沟道MOSFET。 该方法包括提供具有约100％的Ge组成的松弛虚拟衬底和形成在虚拟衬底上的松弛Ge沟道。

    Strained gettering layers for semiconductor processes
    99.
    发明授权
    Strained gettering layers for semiconductor processes 失效
    用于半导体工艺的应变吸收层

    公开(公告)号：US07202124B2

    公开(公告)日：2007-04-10

    申请号：US10956481

    申请日：2004-10-01

    申请人： Eugene A. Fitzgerald ,  Arthur J. Pitera

    发明人： Eugene A. Fitzgerald ,  Arthur J. Pitera

    IPC分类号： H01L21/8238 ,  H01L21/322

    CPC分类号： H01L21/26506 ,  C30B25/20 ,  C30B33/00 ,  H01L21/3221 ,  H01L21/3226 ,  H01L21/76254

    摘要： A method and structure for forming semiconductor structures using tensilely strained gettering layers. The method includes forming a donor wafer comprising a tensilely strained gettering layer disposed over a substrate, and at least one material layer disposed over the tensilely strained gettering layer. Additionally, the donor wafer may possess a particle-confining region proximate the tensilely strained layer. The method also includes introducing particles into the donor wafer to a depth below the surface, and accumulating at least some particles within the tensilely strained gettering layer. Next, the method includes initiating a cleaving action so as to separate at least one of the material layers form the substrate. The tensilely strained gettering layer may accumulate particles and/or point defects and reduce the implantation dose and thermal budget required for cleaving.

    摘要翻译： 使用拉伸应变吸气层形成半导体结构的方法和结构。 该方法包括形成供体晶片，其包括设置在基板上方的拉伸变应的吸气层，以及设置在拉伸变应的吸气层上的至少一个材料层。 此外，施主晶片可以具有靠近拉伸应变层的颗粒约束区域。 该方法还包括将颗粒引入供体晶片到表面下方的深度，并且在拉伸变应的吸气层内积聚至少一些颗粒。 接下来，该方法包括引发切割动作，以将至少一个材料层分离成基底。 拉伸应变吸气层可能会积聚颗粒和/或点缺陷，并减少切割所需的注射剂量和热预算。