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146 条记录 (耗时 0.025 秒)

    Semiconductor constructions and memory arrays
    91.
    发明授权
    Semiconductor constructions and memory arrays 有权
    半导体结构和存储器阵列

    公开(公告)号：US08686394B2

    公开(公告)日：2014-04-01

    申请号：US13551873

    申请日：2012-07-18

    申请人： Fabio Pellizzer ,  Cinzia Perrone

    发明人： Fabio Pellizzer ,  Cinzia Perrone

    IPC分类号： H01L29/06

    CPC分类号： H01L21/31111 ,  H01L21/02115 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1675

    摘要： Some embodiments include methods of forming semiconductor constructions. Carbon-containing material is formed over oxygen-sensitive material. The carbon-containing material and oxygen-sensitive material together form a structure having a sidewall that extends along both the carbon-containing material and the oxygen-sensitive material. First protective material is formed along the sidewall. The first protective material extends across an interface of the carbon-containing material and the oxygen-sensitive material, and does not extend to a top region of the carbon-containing material. Second protective material is formed across the top of the carbon-containing material, with the second protective material having a common composition to the first protective material. The second protective material is etched to expose an upper surface of the carbon-containing material. Some embodiments include semiconductor constructions, memory arrays and methods of forming memory arrays.

    摘要翻译： 一些实施例包括形成半导体结构的方法。 含氧材料在氧敏感材料上形成。 含碳材料和氧敏感材料一起形成具有沿着含碳材料和氧敏感材料两者延伸的侧壁的结构。 第一保护材料沿侧壁形成。 第一保护材料延伸穿过含碳材料和氧敏感材料的界面，并且不延伸到含碳材料的顶部区域。 第二保护材料横跨含碳材料的顶部形成，第二保护材料与第一保护材料具有共同的组成。 蚀刻第二保护材料以暴露含碳材料的上表面。 一些实施例包括半导体构造，存储器阵列和形成存储器阵列的方法。

    MEMORY ARRAYS AND METHODS OF FORMING SAME
    95.
    发明申请
    MEMORY ARRAYS AND METHODS OF FORMING SAME 有权
    记忆阵列及其形成方法

    公开(公告)号：US20130193398A1

    公开(公告)日：2013-08-01

    申请号：US13358882

    申请日：2012-01-26

    申请人： Fabio Pellizzer ,  Antonino Rigano

    发明人： Fabio Pellizzer ,  Antonino Rigano

    IPC分类号： H01L47/00 ,  H01L21/02

    CPC分类号： H01L45/122 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675 ,  H01L45/1691

    摘要： Memory arrays and methods of forming the same are provided. One example method of forming a memory array can include forming a first conductive material having a looped feature using a self-aligning multiple patterning technique, and forming a first sealing material over the looped feature. A first chop mask material is formed over the first sealing material. The looped feature and the first sealing material are removed outside the first chop mask material.

    摘要翻译： 提供了存储器阵列及其形成方法。 形成存储器阵列的一个示例性方法可以包括使用自对准多图案化技术形成具有环形特征的第一导电材料，以及在环形特征上形成第一密封材料。 在第一密封材料上方形成第一剁掩模材料。 环状特征和第一密封材料在第一剁掩模材料外移除。

    Memory including bipolar junction transistor select devices
    97.
    发明授权
    Memory including bipolar junction transistor select devices 有权
    存储器包括双极结型晶体管选择器件

    公开(公告)号：US08283234B2

    公开(公告)日：2012-10-09

    申请号：US13009932

    申请日：2011-01-20

    申请人： Agostino Pirovano ,  Fabio Pellizzer

    发明人： Agostino Pirovano ,  Fabio Pellizzer

    IPC分类号： H01L21/8222 ,  H01L21/331

    CPC分类号： H01L29/735 ,  G11C13/0004 ,  G11C13/003 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0207 ,  H01L27/1022 ,  H01L27/24

    摘要： An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions overlying the common region. Each shared control region forms the control regions of a plurality of adjacent selection transistors and accommodates the first regions of the plurality of adjacent selection transistors as well as contact portions of the shared control region. Blocks of adjacent selection transistors of the plurality of selection transistors share a contact portion and the first regions of a block of adjacent selection transistors are arranged along the shared control region between two contact portions. A plurality of biasing structures are formed between pairs of first regions of adjacent selection transistors, for modifying a charge distribution in the shared control region below the biasing structures.

    摘要翻译： 阵列由多个单元形成，其中每个单元由具有第一，第二和控制区域的双极结选择晶体管形成。 单元包括形成选择晶体管的第二区域的公共区域和覆盖在公共区域上的多个共享控制区域。 每个共享控制区域形成多个相邻选择晶体管的控制区域并且容纳多个相邻选择晶体管的第一区域以及共享控制区域的接触部分。 多个选择晶体管的相邻选择晶体管的块共享接触部分，并且沿着两个接触部分之间的共享控制区域布置相邻选择晶体管的块的第一区域。 在相邻选择晶体管的第一区域对之间形成多个偏置结构，用于修改偏置结构下方的共享控制区域中的电荷分布。

    Forming phase change memory cells
    98.
    发明授权
    Forming phase change memory cells 有权
    形成相变存储单元

    公开(公告)号：US07973302B2

    公开(公告)日：2011-07-05

    申请号：US12346666

    申请日：2008-12-30

    申请人： Yudong Kim ,  Fabio Pellizzer

    发明人： Yudong Kim ,  Fabio Pellizzer

    IPC分类号： H01L29/02 ,  H01L47/00 ,  H01L29/04

    CPC分类号： H01L45/06 ,  H01L27/2445 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

    摘要： Small phase change memory cells may be formed by forming a segmented heater over a substrate. A stop layer may be formed over the heater layer and segmented with the heater layer. Then, sidewall spacers may be formed over the segmented heater to define an aperture between the sidewall spacers that may act as a mask for etching the stop layer over the segmented heater. As a result of the etching using the sidewall spacers as a mask, sublithographic pore may be formed over the heater. Phase change material may be formed within the pore.

    摘要翻译： 可以通过在衬底上形成分段加热器来形成小相变存储器单元。 停止层可以形成在加热器层上并且与加热器层分段。 然后，侧壁间隔物可以形成在分段加热器上方，以在侧壁间隔物之间​​形成孔，其可用作蚀刻分段加热器上的停止层的掩模。 作为使用侧壁间隔物作为掩模的蚀刻的结果，可以在加热器上形成亚光刻孔。 相变材料可以在孔内形成。

    Memory Including Bipolar Junction Transistor Select Devices
    99.
    发明申请
    Memory Including Bipolar Junction Transistor Select Devices 有权
    包含双极结晶体管选择器件的存储器

    公开(公告)号：US20110111572A1

    公开(公告)日：2011-05-12

    申请号：US13009932

    申请日：2011-01-20

    申请人： Agostino Pirovano ,  Fabio Pellizzer

    发明人： Agostino Pirovano ,  Fabio Pellizzer

    IPC分类号： H01L21/328

    CPC分类号： H01L29/735 ,  G11C13/0004 ,  G11C13/003 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0207 ,  H01L27/1022 ,  H01L27/24

    摘要： An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions overlying the common region. Each shared control region forms the control regions of a plurality of adjacent selection transistors and accommodates the first regions of the plurality of adjacent selection transistors as well as contact portions of the shared control region. Blocks of adjacent selection transistors of the plurality of selection transistors share a contact portion and the first regions of a block of adjacent selection transistors are arranged along the shared control region between two contact portions. A plurality of biasing structures are formed between pairs of first regions of adjacent selection transistors, for modifying a charge distribution in the shared control region below the biasing structures.

    摘要翻译： 阵列由多个单元形成，其中每个单元由具有第一，第二和控制区域的双极结选择晶体管形成。 单元包括形成选择晶体管的第二区域的公共区域和覆盖在公共区域上的多个共享控制区域。 每个共享控制区域形成多个相邻选择晶体管的控制区域并且容纳多个相邻选择晶体管的第一区域以及共享控制区域的接触部分。 多个选择晶体管的相邻选择晶体管的块共享接触部分，并且沿着两个接触部分之间的共享控制区域布置相邻选择晶体管的块的第一区域。 在相邻选择晶体管的第一区域对之间形成多个偏置结构，用于修改偏置结构下方的共享控制区域中的电荷分布。

    Forming Phase Change Memory Cell With Microtrenches
    100.
    发明申请
    Forming Phase Change Memory Cell With Microtrenches 审中-公开
    形成相变存储器细胞与微螺旋

    公开(公告)号：US20100197120A1

    公开(公告)日：2010-08-05

    申请号：US12756392

    申请日：2010-04-08

    申请人： Fabio Pellizzer ,  Charles H. Dennison

    发明人： Fabio Pellizzer ,  Charles H. Dennison

    IPC分类号： H01L21/20

    CPC分类号： H01L45/06 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

    摘要： A semiconductor substrate is covered by a dielectric region. The dielectric region accommodates a memory element and a selection element forming a phase change memory cell. The memory element is formed by a resistive element and by a storage region of a phase change material extending on and in contact with the resistive element at a contact area. The selection element is formed by a switching region of chalcogenic material embedded in the dielectric region and belonging to a stack extending on the resistive element and including also the storage region. A mold region extends on top of the resistive element and delimits a trench having a substantially elongated shape. At least one portion of the storage region extends in the trench and defines a phase change memory portion over the contact area.

    摘要翻译： 半导体衬底被电介质区域覆盖。 电介质区域容纳存储元件和形成相变存储单元的选择元件。 存储元件由电阻元件和在接触区域处延伸并与电阻元件接触的相变材料的存储区域形成。 选择元件由嵌入在电介质区域中的属于在电阻元件上延伸并且还包括存储区域的堆叠的金属的切换区域形成。 模具区域在电阻元件的顶部延伸并限定具有基本细长形状的沟槽。 存储区域的至少一部分在沟槽中延伸并限定了接触区域上的相变存储部分。