公开(公告)号：US07915879B2

公开(公告)日：2011-03-29

申请号：US12164672

申请日：2008-06-30

申请人： Holger Kapels ,  Gerald Deboy

发明人： Holger Kapels ,  Gerald Deboy

IPC分类号： G05F1/10

CPC分类号： H02M1/44 ,  H02M3/155

摘要： A switching converter including a rectifier element with nonlinear capacitance. One embodiment provides a switching element configured to be driven in the on state and in the off state. A first capacitive element is between the load path terminals of the switching element and has a nonlinear capacitance characteristic curve dependent on a voltage between the load path connections. A rectifier element is coupled between the inductive storage element and the capacitive storage element such that it enables a current flow between the inductive storage element and the capacitive storage element when the switching element is driven in the off state. A second capacitive element is between the load path terminals of the rectifier element and has a nonlinear capacitance characteristic curve dependent on a voltage between the load path connections.

摘要翻译： 一种开关转换器，包括具有非线性电容的整流元件。 一个实施例提供了一种被配置为在接通状态和断开状态下被驱动的开关元件。 第一电容元件位于开关元件的负载路径端子之间，具有取决于负载路径连接之间的电压的非线性电容特性曲线。 整流元件耦合在感应存储元件和电容性存储元件之间，使得当开关元件被驱动为断开状态时，它能使感应存储元件和电容存储元件之间的电流流动。 第二电容元件位于整流元件的负载路径端子之间，具有取决于负载路径连接之间的电压的非线性电容特性曲线。

公开(公告)号：US07449777B2

公开(公告)日：2008-11-11

申请号：US11238677

申请日：2005-09-29

申请人： Gerald Deboy ,  Marc Fahlenkamp

发明人： Gerald Deboy ,  Marc Fahlenkamp

IPC分类号： H01L23/48

CPC分类号： H01L27/088 ,  H01L25/16 ,  H01L27/0629 ,  H01L29/0634 ,  H01L29/7816 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/30107 ,  H02M3/28 ,  H03K17/0822 ,  H03K2017/0806 ,  H01L2924/00014 ,  H01L2924/00

摘要： A circuit arrangement comprises at least one power component and a drive circuit for the power component, which are integrated in a first and a second semiconductor chip. Only CMOS components of the drive circuit or CMOS components, capacitive components and resistance components of the drive circuit are integrated in the first semiconductor chip, and the at least one power component and further components of the drive circuit are integrated in the second semiconductor chip.

摘要翻译： 电路装置包括集成在第一和第二半导体芯片中的用于功率部件的至少一个功率部件和驱动电路。 只有驱动电路的CMOS部件或CMOS部件，驱动电路的电容部件和电阻部件集成在第1半导体芯片中，驱动电路的至少一个功率部件和其它部件集成在第2半导体芯片中。

公开(公告)号：USRE40352E1

公开(公告)日：2008-06-03

申请号：US10846998

申请日：2004-05-14

申请人： Gerald Deboy ,  Franz Hirler ,  Martin März ,  Hans Weber

发明人： Gerald Deboy ,  Franz Hirler ,  Martin März ,  Hans Weber

IPC分类号： H01L29/76

CPC分类号： H01L29/0847 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/7802 ,  H01L29/7816 ,  H03K17/08142

摘要： The invention relates to a switching transistor presenting reduced switching losses. In the switching transistor, output capacitance is very high when drain/source voltages are low. As the drain/source voltage increases, the capacitance falls to such low values that the energy stored in the transistor becomes very low.

摘要翻译： 本发明涉及一种具有降低的开关损耗的开关晶体管。 在开关晶体管中，当漏极/源极电压低时，输出电容非常高。 随着漏极/源极电压的增加，电容降低到存储在晶体管中的能量变得非常低的低值。

公开(公告)号：US20060181289A1

公开(公告)日：2006-08-17

申请号：US10654696

申请日：2003-09-04

申请人： Gerald Deboy ,  Ilia Zverev

发明人： Gerald Deboy ,  Ilia Zverev

IPC分类号： G01R27/08

CPC分类号： G01R19/0092 ,  H01L2924/0002 ,  H01L2924/00

摘要： A circuit configuration has a load transistor and a current measuring configuration. A method ascertains a load current through a load transistor. The circuit configuration includes a first and a second current sensor with a current measuring transistor in each case. Each of the current sensors provide a current measurement signal that is fed to an evaluation circuit. The evaluation circuit provides, from the first current measurement signal, a current measurement signal that is dependent on the load current. The load transistor and the current measuring transistors are preferably integrated in a common semiconductor body having a multiplicity of transistor cells of identical construction. The evaluation circuit preferably accounts for the spatial position of the cells of the first and second current measuring transistors in the cell array.

摘要翻译： 电路配置具有负载晶体管和电流测量配置。 一种确定通过负载晶体管的负载电流的方法。 电路配置包括在每种情况下具有电流测量晶体管的第一和第二电流传感器。 每个电流传感器提供馈送到评估电路的电流测量信号。 评估电路从第一电流测量信号提供取决于负载电流的电流测量信号。 负载晶体管和电流测量晶体管优选地集成在具有相同结构的多个晶体管单元的公共半导体主体中。 评估电路优选地考虑电池阵列中第一和第二电流测量晶体管的单元的空间位置。

公开(公告)号：US07005761B2

公开(公告)日：2006-02-28

申请号：US10299772

申请日：2002-11-19

申请人： Gerald Deboy ,  Holger Huesken ,  Thomas Laska

发明人： Gerald Deboy ,  Holger Huesken ,  Thomas Laska

IPC分类号： H01H83/00

CPC分类号： H02M7/537 ,  H02M3/335 ,  Y10T307/766 ,  Y10T307/911

摘要： A circuit configuration is used for off-load switching. The circuit configuration can be used as a component in a switch mode power supply, a clocked supply, a voltage regulator, and a lamp switch, wherein the circuit configuration is embodied as an IGBT, especially a field stop IGBT or alternately and additionally as a PT IGBT. A method for using the circuit configuration include three operating modes: in a first operating mode, power for a load is modulated by pulse modulation; in a second operating mode, the power is modulated by changing a switching-on time; and, in a third operating mode, both are implemented.

公开(公告)号：US06847091B2

公开(公告)日：2005-01-25

申请号：US09756539

申请日：2001-01-08

申请人： Gerald Deboy ,  Heinz Mitlehner ,  Jenö Tihanyi

发明人： Gerald Deboy ,  Heinz Mitlehner ,  Jenö Tihanyi

IPC分类号： H01L29/744 ,  H01L21/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/12 ,  H01L29/24 ,  H01L29/78 ,  H01L29/80 ,  H01L23/58

CPC分类号： H01L29/7802 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/1608 ,  H01L29/66068 ,  H01L2924/0002 ,  H01L2924/00

摘要： A vertical semiconductor component having a semiconductor body of a first conductivity type is described. In a surface region of the semiconductor body, at least one zone of a second conductivity type, opposite to the first conductivity type, is embedded. Regions of the second conductivity type are provided in the semiconductor body in a plane running substantially parallel to the surface of the surface region. The regions are in this case sufficiently highly doped that they cannot be depleted of charge carriers when a voltage is applied.

摘要翻译： 描述具有第一导电类型的半导体本体的垂直半导体部件。 在半导体本体的表面区域中嵌有与第一导电类型相反的至少一个第二导电类型的区域。 第二导电类型的区域在基本平行于表面区域的表面的平面中设置在半导体本体中。 在这种情况下，这些区域具有足够高的掺杂性，当施加电压时它们不能耗尽电荷载流子。

公开(公告)号：US06630698B1

公开(公告)日：2003-10-07

申请号：US09786022

申请日：2001-11-09

申请人： Gerald Deboy ,  Dirk Ahlers ,  Helmut Strack ,  Michael Rueb ,  Hans Weber

发明人： Gerald Deboy ,  Dirk Ahlers ,  Helmut Strack ,  Michael Rueb ,  Hans Weber

IPC分类号： H01L2980

CPC分类号： H01L29/7816 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/4232 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/7801 ,  H01L29/7802 ,  H01L29/7825

摘要： The invention relates to a high-voltage semiconductor component comprising semiconductor areas (4, 5) of alternating, different conductivity types which are arranged in a semiconductor body in an alternating manner. In the semiconductor body said semiconductor areas extend from at least one first zone (6) to near a second zone (1) and are variably doped so that the electric field increases progressively from one zone to the other (6, 1)

摘要翻译： 本发明涉及一种高电压半导体元件，其包括以交替方式布置在半导体本体中的交替不同导电类型的半导体区域（4,5）。 在半导体体中，所述半导体区域从至少一个第一区域（6）延伸到靠近第二区域（1）并且可变地掺杂，使得电场从一个区域逐渐增加到另一个区域（6,1）

公开(公告)号：US06614090B2

公开(公告)日：2003-09-02

申请号：US09974650

申请日：2001-10-09

申请人： Gerald Deboy ,  Helmut Strack

发明人： Gerald Deboy ,  Helmut Strack

IPC分类号： H01L2358

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/66712 ,  H01L29/7802 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor component is a charge carrier compensation component formed in a semiconductor body. A semiconductor basic body is disposed in the semiconductor body. The basic body has at least one compensation layer which adjoins a boundary layer and first regions of a first conductivity type and second regions of a second conductivity type are provided along a layout grid. A total quantity of charge of the first regions corresponds approximately to a total quantity of charge of the second regions. At least one semiconductor layer in the semiconductor body adjoins the semiconductor basic body at the boundary layer. A multiplicity of doped regions are embedded in the first surface of the semiconductor layer which form a grid for a cell array of the semiconductor component. The grid in the semiconductor layer is aligned independently of the layout grid in the semiconductor basic body.

公开(公告)号：US06577509B2

公开(公告)日：2003-06-10

申请号：US10079720

申请日：2002-02-21

申请人： Gerald Deboy ,  Gerald Mündel ,  Harald Zöllinger

发明人： Gerald Deboy ,  Gerald Mündel ,  Harald Zöllinger

IPC分类号： H02M3335

CPC分类号： H03K17/0822 ,  H02M3/33507 ,  H02M2001/0006

摘要： The invention relates to a semiconductor circuit having a drive circuit, a load that is disposed between a supply voltage, and a controllable, clocked semiconductor switching element for clocked switching of the load. The invention furthermore relates to a switch-mode power supply having such a semiconductor circuit.

公开(公告)号：US06479876B1

公开(公告)日：2002-11-12

申请号：US09462759

申请日：2000-10-12

申请人： Gerald Deboy ,  Jenoe Tihanyi

发明人： Gerald Deboy ,  Jenoe Tihanyi

IPC分类号： H01L2976

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/167 ,  H01L29/32

摘要： The invention relates to a vertical power MOSFET having additional column-like zones (11, 12) which are arranged in an inner zone (1) and have the same and the opposite conductivity type as/to the inner zone (1). The charge carrier life is reduced in the additional zones (12), which are of the same conductivity type as the inner zone (1), and the inner zone (1) is dimensioned such that the space charge zone does not reach the junction between the inner zone and a drain zone.

摘要翻译： 本发明涉及具有附加的柱状区域（11,12）的垂直功率MOSFET，其布置在内部区域（1）中并且具有与内部区域（1）相同的导电类型。 在与内部区域（1）具有相同导电类型的附加区域（12）中减少电荷载体寿命，并且内部区域（1）的尺寸被设计成使得空间电荷区域不会到达 内部区域和排水区域。