MOS DEVICE FOR ELIMINATING FLOATING BODY EFFECTS AND SELF-HEATING EFFECTS
    91.
    发明申请
    MOS DEVICE FOR ELIMINATING FLOATING BODY EFFECTS AND SELF-HEATING EFFECTS 审中-公开
    用于消除浮动体效应和自加热效应的MOS器件

    公开(公告)号:US20120018809A1

    公开(公告)日:2012-01-26

    申请号:US13127276

    申请日:2010-09-08

    IPC分类号: H01L29/78 H01L21/336

    摘要: A MOS device having low floating charge and low self-heating effects are disclosed. The device includes a connective layer coupling the active gate channel to the Si substrate. The connective layer provides electrical and thermal passages during device operation, which could eliminate floating effects and self-heating effects. An example of a MOS device having a SiGe connector between a Si active channel and a Si substrate is disclosed in detail and a manufacturing process is provided.

    摘要翻译: 公开了具有低浮动电荷和低自热效应的MOS器件。 该器件包括将有源栅极沟道耦合到Si衬底的连接层。 连接层在器件操作期间提供电和热通道,可以消除浮动效应和自热效应。 详细公开了在Si活性通道和Si衬底之间具有SiGe连接器的MOS器件的实例,并提供了制造工艺。

    HYBRID ORIENTATION INVERSION MODE GAA CMOSFET
    93.
    发明申请
    HYBRID ORIENTATION INVERSION MODE GAA CMOSFET 失效
    混合方向反相模式GAA CMOSFET

    公开(公告)号:US20110254102A1

    公开(公告)日:2011-10-20

    申请号:US12810740

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A hybrid orientation inversion mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a racetrack-shaped cross section and are formed of n-type Si (110) and p-type Si(100), respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. The device structure according to the prevent invention is quite simple, compact and highly integrated. In an inversion mode, the devices have different orientation channels, the GAA structure with the racetrack-shaped, high-k gate dielectric layer and metal gate, so as to achieve high carrier mobility, and prevent polysilicon gate depletion and short channel effects.

    摘要翻译: 混合取向反转模式GAA(Gate-All-Around)CMOSFET包括具有第一通道的PMOS区域,具有第二通道的NMOS区域和栅极区域。 第一通道和第二通道具有跑道形横截面并分别由n型Si(110)和p型Si(100)形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 根据本发明的装置结构相当简单,紧凑且高度集成。 在反转模式中,器件具有不同的取向通道,GAA结构具有跑道形,高k栅介质层和金属栅极,从而实现高载流子迁移率,并防止多晶硅栅极耗尽和短沟道效应。

    Hybrid material accumulation mode GAA CMOSFET
    94.
    发明申请
    Hybrid material accumulation mode GAA CMOSFET 失效
    混合材料堆积模式GAA CMOSFET

    公开(公告)号:US20110254099A1

    公开(公告)日:2011-10-20

    申请号:US12810594

    申请日:2010-02-11

    IPC分类号: H01L27/092

    摘要: A Ge and Si hybrid material accumulation mode GAA (Gate-All-Around) CMOSFET includes a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The first channel and the second channel have a circular-shaped cross section and are formed of p-type Ge and n-type Si, respectively; the surfaces of the first channel and the second channel are substantially surrounded by the gate region; a buried oxide layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the Si substrate to isolate them from one another. In an accumulation mode, current flows through the overall cylindrical channel, so as to achieve high carrier mobility, reduce low-frequency noises, prevent polysilicon gate depletion and short channel effects and increase the threshold voltage of the device.

    摘要翻译: Ge和Si混合材料堆积模式GAA(Gate-All-Around)CMOSFET包括具有第一沟道的PMOS区域,具有第二沟道的NMOS区域和栅极区域。 第一通道和第二通道具有圆形截面并分别由p型Ge和n型Si形成; 第一通道和第二通道的表面基本上被栅极区域包围; 在PMOS区域和NMOS区域之间以及在PMOS或NMOS区域和Si衬底之间设置掩埋氧化物层以将它们彼此隔离。 在累积模式下,电流流过整个圆柱形通道,以实现高载流子迁移率,降低低频噪声,防止多晶硅栅极耗尽和短沟道效应,并增加器件的阈值电压。

    DRAM CELL UTILIZING FLOATING BODY EFFECT AND MANUFACTURING METHOD THEREOF
    95.
    发明申请
    DRAM CELL UTILIZING FLOATING BODY EFFECT AND MANUFACTURING METHOD THEREOF 有权
    DRAM电池利用浮动体的效果及其制造方法

    公开(公告)号:US20110199842A1

    公开(公告)日:2011-08-18

    申请号:US12934745

    申请日:2010-07-14

    摘要: The present invention discloses a DRAM cell utilizing floating body effect and a manufacturing method thereof. The DRAM cell includes a first N type semiconductor region provided on a buried oxide layer, a P type semiconductor region provided on the first N type semiconductor region, a gate region provided on the P type semiconductor region, and an electrical isolation region surrounding the P type semiconductor region and the N type semiconductor region. A diode is taken as a storage node. Via a tunneling effect between bands, holes gather in the floating body, which is defined as a first storage state; via forward bias of PN junction, holes are emitted out from the floating body or electrons are injected into the floating body, which is defined as a second storage state. The present invention provides a highly efficient DRAM cell utilizing floating body effect with high density, which has low power consumption, has simple manufacturing process, and is compatible to the conventional CMOS and conventional logic circuit manufacturing process.

    摘要翻译: 本发明公开了一种利用浮体效应的DRAM单元及其制造方法。 DRAM单元包括设置在掩埋氧化物层上的第一N型半导体区域,设置在第一N型半导体区域上的P型半导体区域,设置在P型半导体区域上的栅极区域和围绕P型半导体区域的电隔离区域 型半导体区域和N型半导体区域。 二极管作为存储节点。 通过带之间的隧道效应,孔被聚集在浮体中,其被定义为第一储存状态; 通过PN结的正向偏压,空穴从浮体发射出来,或者电子被注入浮动体,其被定义为第二存储状态。 本发明提供一种利用高密度的浮体效应的高效率DRAM单元,其具有低功耗,制造工艺简单,并且与常规CMOS和常规逻辑电路制造工艺兼容。

    METHOD FOR EVALUATING THE VIRULENCE OF PATHOGENIC BIPHASIC BACTERIA
    96.
    发明申请
    METHOD FOR EVALUATING THE VIRULENCE OF PATHOGENIC BIPHASIC BACTERIA 审中-公开
    评估病原性嗜酸细菌病毒的方法

    公开(公告)号:US20110129843A1

    公开(公告)日:2011-06-02

    申请号:US13054988

    申请日:2009-07-29

    IPC分类号: C12Q1/68

    摘要: A method for evaluating relative bacterial virulence of a biphasic bacteria in environmental systems includes measuring the concentration of DNA in the bacteria, measuring the concentration of RNA in the bacteria, determining a ratio of the concentration of RNA to the concentration of DNA and correlating the concentration ratio with a level of relative pathogenicity, wherein the bacteria is preferentially Legionella pneumophila, Mycobacterium tuberculosis and Listeria.

    摘要翻译: 用于评估环境系统中双相细菌的相对细菌毒力的方法包括测量细菌中DNA的浓度,测量细菌中RNA的浓度,确定RNA的浓度与DNA浓度的比例,并将浓度 比例与相对致病性水平,其中细菌优选为嗜肺军团菌,结核分枝杆菌和李斯特菌。

    POWER MODULE AND CIRCUIT BOARD ASSEMBLY THEREOF
    97.
    发明申请
    POWER MODULE AND CIRCUIT BOARD ASSEMBLY THEREOF 有权
    电源模块和电路板组件

    公开(公告)号:US20110032683A1

    公开(公告)日:2011-02-10

    申请号:US12851237

    申请日:2010-08-05

    IPC分类号: H05K7/02

    摘要: A power module includes a first bobbin, a primary winding coil, a circuit board assembly and a first magnetic core assembly. The primary winding coil is wound around the first bobbin. The circuit board assembly includes a printed circuit board, a second winding structure, at least one current-sensing element, a rectifier circuit and an electrical connector. The second winding structure has an output terminal. The current-sensing element includes a first conductor. The first conductor is a conductive sheet. A first end of the first conductor is in contact with the output terminal of the second winding structure. A second end of the first conductor is connected to the rectifier circuit. The primary winding coil is aligned with the second winding structure of the circuit board assembly and arranged within the first magnetic core assembly. The primary winding coil and the electrical connector are electrically connected with a system board.

    摘要翻译: 功率模块包括第一线圈架,初级绕组线圈,电路板组件和第一磁芯组件。 初级绕组线圈缠绕在第一线轴上。 电路板组件包括印刷电路板,第二绕组结构,至少一个电流感测元件,整流器电路和电连接器。 第二绕组结构具有输出端子。 电流检测元件包括第一导体。 第一导体是导电片。 第一导体的第一端与第二绕组结构的输出端接触。 第一导体的第二端连接到整流电路。 初级绕组线圈与电路板组件的第二绕组结构对准并且布置在第一磁芯组件内。 初级绕组线圈和电连接器与系统板电连接。

    TRANSISTORS AND RECTIFIERS UTILIZING HYBRID ELECTRODES AND METHODS OF FABRICATING THE SAME
    98.
    发明申请
    TRANSISTORS AND RECTIFIERS UTILIZING HYBRID ELECTRODES AND METHODS OF FABRICATING THE SAME 有权
    使用混合电极的晶体管和整流器及其制造方法

    公开(公告)号:US20110018002A1

    公开(公告)日:2011-01-27

    申请号:US12843313

    申请日:2010-07-26

    摘要: Systems, methods, and apparatus described herein are associated with devices including hybrid electrodes. A heterostructure semiconductor transistor can include a III-N-type semiconductor heterostructure including a barrier layer overlying an active layer and a hybrid electrode region including a hybrid drain electrode region. Further, a heterostructure semiconductor rectifier can include a III-N-type semiconductor heterostructure and a hybrid electrode region including a hybrid cathode electrode region. Furthermore, the hybrid electrode region of the transistor and rectifier can include permanently trapped charge located under a Schottky contact of the hybrid electrode region.

    摘要翻译: 本文描述的系统,方法和装置与包括混合电极的装置相关联。 异质结构半导体晶体管可以包括包括有源层上的阻挡层的III-N型半导体异质结构和包括混合漏电极区的混合电极区。 此外,异质结构半导体整流器可以包括III-N型半导体异质结构和包括混合阴极电极区的混合电极区。 此外,晶体管和整流器的混合电极区域可以包括位于混合电极区域的肖特基接触下的永久俘获的电荷。

    ALUMINUM GALLIUM NITRIDE/GALLIUM NITRIDE HIGH ELECTRON MOBILITY TRANSISTORS
    99.
    发明申请
    ALUMINUM GALLIUM NITRIDE/GALLIUM NITRIDE HIGH ELECTRON MOBILITY TRANSISTORS 审中-公开
    氮化镓/氮化镓高电子移动晶体管

    公开(公告)号:US20100084687A1

    公开(公告)日:2010-04-08

    申请号:US12558242

    申请日:2009-09-11

    申请人: Jing Chen Maojun Wang

    发明人: Jing Chen Maojun Wang

    IPC分类号: H01L29/778 H01L21/335

    摘要: Structures, devices and methods are provided for creating enhanced back barriers that improve the off-state breakdown and blocking characteristics in aluminum gallium nitride AlGaN/GaN high electron mobility transistors (HEMTs). In one aspect, selective fluorine ion implantation is employed when developing HEMTs to create the enhanced back barrier structures. By creating higher energy barriers at the back of the two-dimensional electron gas channel in the unintentionally doped GaN buffer, higher off-state breakdown voltage is advantageously provided and blocking capability is enhanced, while allowing for convenient and cost-effective post-epitaxial growth fabrication. Further non-limiting embodiments are provided that illustrate the advantages and flexibility of the disclosed structures.

    摘要翻译: 提供了结构,装置和方法,用于产生改进的氮化镓铝AlGaN / GaN高电子迁移率晶体管(HEMT)中的截止状态击穿和阻挡特性的增强后阻挡层。 在一个方面,当开发HEMT以产生增强的背景屏障结构时,采用选择性氟离子注入。 通过在无意掺杂的GaN缓冲器中在二维电子气体通道的背面产生更高的能量势垒,有利地提供更高的截止击穿电压,并且提高了阻挡能力,同时允许方便且具有成本效益的外延生长 制造。 提供了另外的非限制性实施例,其示出了所公开的结构的优点和灵活性。

    Method for producing 1,2-propylene glycol using bio-based glycerol
    100.
    发明授权
    Method for producing 1,2-propylene glycol using bio-based glycerol 失效
    使用生物基甘油生产1,2-丙二醇的方法

    公开(公告)号:US07586016B2

    公开(公告)日:2009-09-08

    申请号:US12232982

    申请日:2008-09-26

    IPC分类号: C07C29/132

    摘要: This invention disclosed a method for producing 1,2-propylene glycol from bio-based glycerol. In this method, a CuO—CeO2—SiO2 catalyst is filled into a fixed bed reactor, a glycerol solution is flowed into the reactor together with hydrogen gas in a manner of top feeding, and controlling the reaction temperature to be 170˜200° C., the reaction pressure to be 1.0˜5.0 MPa, so as to realize the production of 1,2-propylene glycol from the hydrogenation of glycerol. The catalyst used in this invention can sustain a high selectivity for the target product and a high conversion for glycerol for 500 hours.

    摘要翻译: 本发明公开了一种从生物基甘油生产1,2-丙二醇的方法。 在该方法中,将CuO-CeO 2 -SiO 2催化剂填充到固定床反应器中,以顶部进料的方式将甘油溶液与氢气一起流入反应器,控制反应温度为170〜200℃ 反应压力为1.0〜5.0MPa,从而实现甘油氢化制备1,2-丙二醇。 用于本发明的催化剂可以维持目标产物的高选择性和甘油的高转化率500小时。