公开(公告)号：US11670504B2

公开(公告)日：2023-06-06

申请号：US16419426

申请日：2019-05-22

Applicant: Intel Corporation

Inventor： Jeremy D. Ecton ,  Brandon C. Marin ,  Andrew J. Brown ,  Dilan Seneviratne

IPC: H01L21/02 ,  H01L23/532 ,  H01L21/768 ,  H01L49/02

CPC classification number: H01L21/02345 ,  H01L21/02118 ,  H01L21/02167 ,  H01L21/02194 ,  H01L21/76825 ,  H01L21/76841 ,  H01L23/5329 ,  H01L23/53228 ,  H01L28/60

Abstract: A thin-film insulator comprises a first electrode over a substrate. A photo up-converting material is over the first electrode. A cured photo-imageable dielectric (PID) containing a high-k filler material is over the photo up-converting material, wherein the cured PID is less than 4 μm in thickness, and a second electrode is over the cured PID.

公开(公告)号：US20230080454A1

公开(公告)日：2023-03-16

申请号：US17473694

申请日：2021-09-13

Applicant: Intel Corporation

Inventor： Srinivas V. Pietambaram ,  Brandon C. Marin ,  Debendra Mallik ,  Tarek A. Ibrahim ,  Jeremy Ecton ,  Omkar G. Karhade ,  Bharat Prasad Penmecha ,  Xiaoqian Li ,  Nitin A. Deshpande ,  Mitul Modi ,  Bai Nie

IPC: G02B6/12 ,  H01L23/48

Abstract: An optoelectronic assembly is disclosed, comprising a substrate having a core comprised of glass, and a photonic integrated circuit (PIC) and an electronic IC (EIC) coupled to a first side of the substrate. The core comprises a waveguide with a first endpoint proximate to the first side and a second endpoint exposed on a second side of the substrate orthogonal to the first side. The first endpoint of the waveguide is on a third side of the core parallel to the first side of the substrate. The substrate further comprises an optical via aligned with the first endpoint, and the optical via extends between the first side and the third side. In various embodiments, the waveguide is of any shape that can be inscribed by a laser between the first endpoint and the second endpoint.

公开(公告)号：US20220406512A1

公开(公告)日：2022-12-22

申请号：US17352952

申请日：2021-06-21

Applicant: Intel Corporation

Inventor： Xin Ning ,  Kyu-oh Lee ,  Brent Williams ,  Brandon C. Marin ,  Tarek A. Ibrahim ,  Krishna Bharath ,  Sai Vadlamani

IPC: H01F27/255 ,  H01F27/29 ,  H01F27/28 ,  H01F41/04 ,  H01F41/02

Abstract: Techniques and mechanisms for providing structures of a magnetic material based inductor. In an embodiment, an inductor comprises a body of a magnetic material, and a conductor which extends along a surface of the body. The body comprises a carrier material and magnetic filler particles distributed in the carrier material. A passivation material of the inductor is provided adjacent to the conductor and to surfaces of the filler particles. The conductor and the passivation material comprise different respective material compositions, wherein the passivation material comprises one of nickel, tin, copper, palladium, or gold. In another embodiment, the inductor is one of a plated through hole inductor type of a planar inductor type.

公开(公告)号：US20220005638A1

公开(公告)日：2022-01-06

申请号：US17482861

申请日：2021-09-23

Applicant: Intel Corporation

Inventor： Brandon C. Marin ,  Frank Truong ,  Shivasubramanian Balasubramanian

IPC: H01F1/20 ,  H01F27/28 ,  H01L23/00 ,  H01L23/64 ,  H01L23/498 ,  H01F17/00

Abstract: A magnetic material may be fabricated with a plurality of magnetic filler particles dispersed within a carrier material, wherein at last one of the magnetic filler particles may comprise a ferromagnetic core coated with an inert material to form a shell surrounding the ferromagnetic core. Such a coating may allow for the use of ferromagnetic materials for forming embedded inductors in package substrates without the risk of being incompatible with fabrication processes used to form these package substrates.

公开(公告)号：US20210375746A1

公开(公告)日：2021-12-02

申请号：US16884452

申请日：2020-05-27

Applicant: INTEL CORPORATION

Inventor： Hongxia Feng ,  Jeremy Ecton ,  Aleksandar Aleksov ,  Haobo Chen ,  Xiaoying Guo ,  Brandon C. Marin ,  Zhiguo Qian ,  Daryl Purcell ,  Leonel Arana ,  Matthew Tingey

IPC: H01L23/522 ,  H01L23/66

Abstract: Processes and structures resulting therefrom for the improvement of high speed signaling integrity in electronic substrates of integrated circuit packages, which is achieved with the formation of airgap structures within dielectric material(s) between adjacent conductive routes that transmit/receive electrical signals, wherein the airgap structures decrease the capacitance and/or decrease the insertion losses in the dielectric material used to form the electronic substrates.

公开(公告)号：US20210280463A1

公开(公告)日：2021-09-09

申请号：US16809905

申请日：2020-03-05

Applicant: INTEL CORPORATION

Inventor： Jeremy Ecton ,  Brandon C. Marin ,  Leonel Arana ,  Matthew Tingey ,  Oscar Ojeda ,  Hsin-Wei Wang ,  Suddhasattwa Nad ,  Srinivas Pietambaram ,  Gang Duan

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/532

Abstract: A conductive route for an integrated circuit assembly may be formed using a sequence of etching and passivation steps through layers of conductive material, wherein the resulting structure may include a first route portion having a first surface, a second surface, and at least one side surface extending between the first surface and the second surface, an etch stop structure on the first route portion, a second route portion on the etch stop layer, wherein the second route portion has a first surface, a second surface, and at least one side surface extending between the first surface and the second surface, and a passivating layer abutting the at least one side surface of the second route portion.

公开(公告)号：US20190287841A1

公开(公告)日：2019-09-19

申请号：US15922749

申请日：2018-03-15

Applicant: Intel Corporation

Inventor： Frank Truong ,  Praneeth Akkinepally ,  Chelsea M. Groves ,  Whitney M. Bryks ,  Jason M. Gamba ,  Brandon C. Marin

IPC: H01L21/683 ,  H01L21/687 ,  C09J5/06

Abstract: A system is disclosed, which comprises a component carrier having a first side, and a second side opposite the first side; and a light source to couple light into the carrier. In an example, the carrier is to propagate, through internal reflection, at least a portion the light to both the first and second sides of the carrier. The portion of light may be sufficient to release a first component and second component affixed to the first and second sides of the carrier via a first photosensitive layer and second photosensitive layer, respectively.