公开(公告)号：US20220398197A1

公开(公告)日：2022-12-15

申请号：US17863453

申请日：2022-07-13

Applicant: Mellanox Technologies, Ltd.

Inventor： Daniel Marcovitch ,  Gil Bloch ,  Richard Graham ,  Ariel Shahar ,  Roee Moyal ,  Igor Voks

IPC: G06F12/0813 ,  G06F12/06 ,  G06F9/54 ,  G06F9/50

Abstract: A network device in a communication network includes a controller and processing circuitry. The controller is configured to manage execution of an operation whose execution depends on inputs from a group of one or more work-request initiators. The processing circuitry is configured to read one or more values, which are set by the work-request initiators in one or more memory locations that are accessible to the work-request initiators and to the network device, and to trigger execution of the operation in response to verifying that the one or more values read from the one or more memory locations indicate that the work-request initiators in the group have provided the respective inputs.

公开(公告)号：US11502948B2

公开(公告)日：2022-11-15

申请号：US17108002

申请日：2020-12-01

Applicant: Mellanox Technologies, Ltd

Inventor： Boris Pismenny ,  Miriam Menes ,  Idan Burstein ,  Liran Liss ,  Noam Bloch ,  Ariel Shahar

IPC: H04L45/00 ,  H04L45/42 ,  G06F11/10 ,  H04L69/163 ,  H04L69/22

Abstract: A system includes a host processor, which has a host memory and is coupled to store data in a non-volatile memory in accordance with a storage protocol. A network interface controller (NIC) receives data packets conveyed over a packet communication network from peer computers containing, in payloads of the data packets, data records that encode data in accordance with the storage protocol for storage in the non-volatile memory. The NIC processes the data records in the data packets that are received in order in each flow from a peer computer and extracts and writes the data to the host memory, and when a data packet arrives out of order, writes the data packet to the host memory without extracting the data and processes the data packets in the flow so as to recover context information for use in processing the data records in subsequent data packets in the flow.

公开(公告)号：US11451493B2

公开(公告)日：2022-09-20

申请号：US17142366

申请日：2021-01-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Yefet ,  Daniel Marcovitch ,  Roee Moyal ,  Ariel Shahar ,  Gil Bloch ,  Lior Narkis

IPC: H04N21/238 ,  H04L49/901 ,  H04L41/0604 ,  H04L49/253 ,  H04L49/9005

Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface connects to a communication network for communicating with remote targets. The host interface connects to a host that accesses a Multi-Channel Send Queue (MCSQ) storing Work Requests (WRs) originating from client processes running on the host. The processing circuitry is configured to retrieve WRs from the MCSQ and distribute the WRs among multiple Send Queues (SQs) accessible by the processing circuitry.

公开(公告)号：US20220245251A1

公开(公告)日：2022-08-04

申请号：US17163599

申请日：2021-02-01

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Mor Hoyda Sfadia ,  Yuval Itkin ,  Ahmad Atamli ,  Ariel Shahar ,  Yaniv Strassberg ,  Itsik Levi

IPC: G06F21/57 ,  G06F8/65 ,  G06F9/445

Abstract: A computer system includes a volatile memory and at least one processor. The volatile memory includes a protected storage segment (PSS) configured to store firmware-authentication program code for authenticating firmware of the computer system. The at least one processor is configured to receive a trigger to switch to a given version of the firmware, to obtain, in response to the trigger, a privilege to access the PSS, to authenticate the given version of the firmware by executing the firmware-authentication program code from the PSS, to switch to the given version of the firmware upon successfully authenticating the given version, and to take an alternative action upon failing to authenticate the given version.

公开(公告)号：US20220006606A1

公开(公告)日：2022-01-06

申请号：US17335122

申请日：2021-06-01

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Ariel Shahar ,  Shahaf Shuler ,  Ariel Almog ,  Eitan Hirshberg ,  Natan Manevich

IPC: H04L7/00

Abstract: A timing system including timing circuitry which includes an arming queue, a clock work queue, and a clock completion queue. At least the clock work queue is to provide timing information, and the arming queue is to arm the clock work queue. Related apparatus and methods are also provided.

公开(公告)号：US20210406179A1

公开(公告)日：2021-12-30

申请号：US16916153

申请日：2020-06-30

Applicant: Mellanox Technologies, Ltd.

Inventor： Daniel Marcovitch ,  Gil Bloch ,  Richard Graham ,  Ariel Shahar ,  Roee Moyal ,  Igor Voks

IPC: G06F12/0813 ,  G06F12/06 ,  G06F9/50 ,  G06F9/54

Abstract: A network device in a communication network includes a controller and processing circuitry. The controller is configured to manage execution of an operation whose execution depends on inputs from a group of one or more work-request initiators. The processing circuitry is configured to read one or more values, which are set by the work-request initiators in one or more memory locations that are accessible to the work-request initiators and to the network device, and to trigger execution of the operation in response to verifying that the one or more values read from the one or more memory locations indicate that the work-request initiators in the group have provided the respective inputs.

公开(公告)号：US10852967B2

公开(公告)日：2020-12-01

申请号：US15963236

申请日：2018-04-26

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ariel Shahar ,  Peter Paneah ,  Maxim Zaborov

IPC: G06F3/06 ,  G06F13/16

Abstract: Apparatuses and methods are described that provide for a mechanism for allocating physical device memory for one or more virtual functions. In particular, a memory allocating framework is provided to utilize device memory more efficiently by mapping at least one target location of the physical memory in a Base Address Register (BAR) associated with the virtual function from a plurality of available target locations based on an allocation request. The memory allocating framework is further configured to compare an indication associated with the requesting virtual function to an identifier of the requested target location. Moreover, the memory allocating framework is further configured to allow the simultaneous use of more than one virtual function at a time while providing isolation between multiple virtual functions.

公开(公告)号：US20200084150A1

公开(公告)日：2020-03-12

申请号：US16559640

申请日：2019-09-04

Applicant: Mellanox Technologies, Ltd.

Inventor： Idan Burstein ,  Noam Bloch ,  Roee Moyal ,  Ariel Shahar ,  Yamin Friedman ,  Yuval Shpigelman

IPC: H04L12/801 ,  H04L12/927 ,  H04L12/841 ,  H04L12/863 ,  H04L29/08

Abstract: A network adapter includes circuitry and one or more ports. The ports connect to a communication network including multiple network elements. The circuitry accesses outbound messages that are pending to be sent over the communication network to multiple remote nodes via the ports. At least some of the outbound messages request the remote nodes to send respective amounts of data back to the network adapter. Based on the amounts of data requested by the outbound messages, the circuitry forecasts a bandwidth of inbound response traffic, which is expected to traverse a selected network element in response to the outbound messages toward the network adapter, determines a schedule for transmitting the outbound messages to the remote nodes so that the forecasted bandwidth meets a bandwidth supported by the selected network element, and transmits the outbound messages to the remote nodes in accordance with the determined schedule.

公开(公告)号：US10462060B2

公开(公告)日：2019-10-29

申请号：US15896128

申请日：2018-02-14

Applicant: Mellanox Technologies, Ltd.

Inventor： Jacob Ruthstein ,  David Mozes ,  Dror Bohrer ,  Ariel Shahar ,  Lior Narkis ,  Noam Bloch

IPC: H04L12/851 ,  H04L12/26 ,  H04L12/801

Abstract: Packet flows received in a data network are assigned to respective entries of a database. During an accumulation interval byte counts of the assigned packet flows are accumulated in the respective database entries. The packet flows are classified as elephant flows when differences between the byte counts and a reference byte count exceed a threshold and are reported after expiration of the accumulation interval.

公开(公告)号：US10430374B2

公开(公告)日：2019-10-01

申请号：US15196088

申请日：2016-06-29

Applicant: Mellanox Technologies Ltd.

Inventor： Adi Menachem ,  Ariel Shahar ,  Noam Bloch ,  Diego Crupnicoff ,  Michael Kagan

IPC: G06F15/173 ,  H04L29/06 ,  G06F13/28 ,  H04L1/16 ,  H04L1/18

Abstract: A method for data transfer includes transmitting a sequence of data packets, including at least a first packet and a second packet transmitted subsequently to the first packet, from a first computer over a network to a second computer in a single remote direct memory access (RDMA) data transfer transaction. Upon receipt of the second packet at the second computer without previously having received the first packet, a negative acknowledgment (NAK) packet is sent from the second computer over the network to the first computer, indicating that the first packet was not received. In response to the NAK packet, the first packet is retransmitted from the first computer to the second computer without retransmitting the second packet.