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公开(公告)号：US10719439B2
公开(公告)日：2020-07-21
申请号：US15696462
申请日：2017-09-06
Applicant: Seagate Technology LLC
Inventor： Ryan James Goss , Siddhartha K. Panda , Daniel J. Benjamin , Ryan C. Weidemann
Abstract: A method operable with the storage device includes determining a workload to the storage device based on host Input/Output (I/O) requests to the storage device. When the workload is above a threshold, a first portion of the storage device is selected for garbage collection based on the I/O requests. Otherwise, when the workload is below the threshold, a second different portion of the storage device is selected for garbage collection based on a storage ability of the second portion of the storage device.
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公开(公告)号：US20200091937A1
公开(公告)日：2020-03-19
申请号：US16553074
申请日：2019-08-27
Applicant: Seagate Technology LLC
Inventor： Nicholas Odin Lien , Jay Allen Sheldon , Ryan James Goss , Ara Patapoutian
Abstract: Embodiments herein provide for a controller that is operable to soft read a data bit a plurality of times, to generate a bit set for the data bit from the soft reads, to logically operate on the bit set, and to generate a Hamming weight for the data bit based on the logical operation. The Hamming weight has fewer bits than the bit set and is operable to correct the data bit.
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公开(公告)号：US10396821B2
公开(公告)日：2019-08-27
申请号：US15639828
申请日：2017-06-30
Applicant: Seagate Technology LLC
Inventor： Nicholas Odin Lien , Jay Allen Sheldon , Ryan James Goss , Ara Patapoutian
Abstract: Embodiments herein provide for a controller that is operable to soft read a data bit a plurality of times, to generate a bit set for the data bit from the soft reads, to logically operate on the bit set, and to generate a Hamming weight for the data bit based on the logical operation. The Hamming weight has fewer bits than the bit set and is operable to correct the data bit.
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公开(公告)号：US10324648B1
公开(公告)日：2019-06-18
申请号：US15495036
申请日：2017-04-24
Applicant: Seagate Technology LLC
Inventor： Ryan James Goss , Antoine Khoueir , Ara Patapoutian
Abstract: Systems and methods are disclosed for wear-based access optimization. An apparatus may comprise a circuit configured to perform a data access operation at a target location of a memory, and determine a wear value of the target location. The circuit may compare the wear value to global wear value of other locations of the drive, and adjust data access parameters for the target location based on the comparison.
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公开(公告)号：US10089170B1
公开(公告)日：2018-10-02
申请号：US15183710
申请日：2016-06-15
Applicant: Seagate Technology LLC
Inventor： Ryan James Goss , Antoine Khoueir , Ara Patapoutian
IPC: G06F11/07
Abstract: Systems and methods are disclosed for open block management. In certain embodiments, an apparatus may comprise a circuit configured to determine an error sensitivity of a last-written page of a block of a solid state memory that is in an open state where the block has not been fully filled with data. The error sensitivity may include a value that represents a susceptibility to developing data errors while in the open state. The circuit may perform a first error mitigation procedure when the error sensitivity is lower than a first threshold, include increasing an open block timeout period applied to the last-written page. The circuit may perform a second error mitigation procedure when the error sensitivity is higher than the first threshold, including copying data from the block to a new location when a first open block timeout is reached.
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Patent Agency Ranking
公开(公告)号：US09858002B1
公开(公告)日：2018-01-02
申请号：US15154501
申请日：2016-05-13
Applicant: Seagate Technology LLC
Inventor： Ryan James Goss , Antoine Khoueir , Ara Patapoutian
CPC classification number: G06F3/0619 , G06F3/064 , G06F3/0653 , G06F3/0679 , G11C16/3431
Abstract: Systems and methods are disclosed for open block stability scanning. When a solid state memory block remains in an open state, where the block is only partially filled with written data, for a prolonged period of time, a circuit may perform a scan on the block to determine the stability of the stored data. When the scan indicates that the data is below a stability threshold, the data may be refreshed by reading the data and writing it to a new location. When the scan indicates that the data is above a stability threshold, the circuit may extend the time period in which the block may remain in the open state.
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公开(公告)号：US20170131902A1
公开(公告)日：2017-05-11
申请号：US15412184
申请日：2017-01-23
Applicant: Seagate Technology LLC
Inventor： Ryan James Goss , Mark Allen Gaertner , Michael Joseph Steiner
IPC: G06F3/06
CPC classification number: G06F3/061 , G06F3/0643 , G06F3/0649 , G06F3/0655 , G06F3/0685 , G06F3/0688 , G06F12/0238 , G06F12/0246 , G06F12/0653 , G06F2212/261
Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, a data object is stored in a first non-volatile tier of a multi-tier memory structure. A metadata unit is generated to describe the data object, the metadata unit having a selected granularity. The metadata unit is stored in a different, second non-volatile tier of the multi-tier memory structure responsive to the selected granularity.
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公开(公告)号：US09507710B2
公开(公告)日：2016-11-29
申请号：US14703522
申请日：2015-05-04
Applicant: Seagate Technology LLC
Inventor： Kris Conklin , Bruce Dunlop , Mark Allen Gaertner , Ryan James Goss
CPC classification number: G06F12/0246 , G06F13/161 , G06F2212/1016 , G06F2212/7203
Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a memory module has a plurality of solid-state non-volatile memory cells. A controller communicates a first command having address information and a first operation code. The first operation code identifies a first action to be taken by the memory module in relation to the address information. The controller subsequently communicates a second command having a second operation code without corresponding address information. The memory module takes a second action identified by the second command using the address information from the first command.
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99.发明授权公开(公告)号：US09424946B2
公开(公告)日：2016-08-23
申请号：US13762806
申请日：2013-02-08
Applicant: Seagate Technology LLC
Inventor： Kevin Arthur Gomez , Michael Joseph Steiner , Mark Allen Gaertner , Ryan James Goss
IPC: G11C16/34
CPC classification number: G11C16/3454
Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, input write data having a selected logical address are stored in a rewriteable non-volatile (NV) buffer. A copy of the input write data is transferred to an NV main memory using a sloppy write process. A verify operation is subsequently performed to verify successful transfer of the copy of the input write data to the NV main memory using a hash value generated responsive to the input write data in the NV buffer.
Abstract translation: 用于管理存储器中的数据的方法和装置。 根据一些实施例，具有选择的逻辑地址的输入写入数据被存储在可重写的非易失性（NV）缓冲器中。 输入写入数据的副本使用歪曲的写入过程被传送到NV主存储器。 随后执行验证操作以使用响应于NV缓冲器中的输入写入数据生成的散列值来验证输入写入数据的副本成功传送到NV主存储器。
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公开(公告)号：US09349444B2
公开(公告)日：2016-05-24
申请号：US14595757
申请日：2015-01-13
Applicant: Seagate Technology LLC
Inventor： Ara Patapoutian , Ryan James Goss , Antoine Khoueir
CPC classification number: G11C13/0002 , G11C7/04 , G11C11/56 , G11C13/0004 , G11C13/0007 , G11C13/0033 , G11C13/0035 , G11C13/004 , G11C13/0069 , G11C29/08 , G11C2013/0076
Abstract: Two or more workload indicators affecting a memory cell of a resistance-based, non-volatile memory are measured. The two or more workload indicators are applied to a transfer function that predicts a resistance shift and/or resistance noise variance in response to the two or more workload indicators. A result of the transfer function is applied to shift and/or determine a threshold resistance used for at least one of a program operation and a read operation affecting the memory cell. An error rate of the memory cell is reduced as a result.
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