公开(公告)号：US07027027B2

公开(公告)日：2006-04-11

申请号：US10226198

申请日：2002-08-23

申请人： Hironori Minamizaki ,  Tetsuro Itakura

发明人： Hironori Minamizaki ,  Tetsuro Itakura

IPC分类号： G09G3/36

CPC分类号： H03F3/211 ,  G09G3/3614 ,  G09G2310/027 ,  H03F1/0277 ,  H03F2203/45371 ,  H03F2203/7236 ,  H03K5/2481

摘要： A differential amplifying circuit according to the present invention, comprising: a first differential pair having first and second transistors of the same conduction type, which outputs differential output signals in accordance with differential input signals supplied to gate terminals of said first and second transistors from differential output terminals; a second differential pair having third and fourth transistors having the same conduction type as that of said first and second transistors with threshold voltages different from each other, which outputs differential output signals in accordance with said differential input signals supplied to gate terminals of said third and fourth transistors from said differential output terminals; a bias supply part which supplies bias current to said first and second differential parts; and a differential pair control part which controls whether or not to operate said second differential pair.

公开(公告)号：US07009448B2

公开(公告)日：2006-03-07

申请号：US11216100

申请日：2005-09-01

申请人： Tetsuro Itakura ,  Takafumi Yamaji

发明人： Tetsuro Itakura ,  Takafumi Yamaji

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  G11C27/024 ,  G11C27/026 ,  H03F3/45632 ,  H03F3/45928 ,  H03F3/45977 ,  H03F2203/45101 ,  H03F2203/45138 ,  H03F2203/45428 ,  H03F2203/45574 ,  H03H11/1243 ,  H03H11/32

摘要： An operational amplifier circuit is constituted by first and second inverted amplifier circuits (A1, A2) that receive first and second input signals, a third inverted amplifier circuit (A3) that receives an estimated common-mode output signal and an output signal from the first inverted amplifier circuit and outputs first and second output signals, a fourth inverted amplifier circuit (A4) that receives the estimated common-mode output signal and an output signal from the second inverted amplifier circuit and outputs third and fourth output signals, where the estimated common-mode output signal is generated by adding the second output signal and the fourth output signal, and first and second non-inverted amplifier circuits (A5, A6) that receive the estimated common-mode output signal and feed it back to the first and second inverted amplifier circuits.

摘要翻译： 运算放大器电路由接收第一和第二输入信号的第一和第二反相放大器电路（A 1，A 2）构成，第三反相放大器电路（A 3），其接收估计的共模输出信号和输出信号 从第一反相放大器电路输出第一和第二输出信号;第四反相放大电路（A 4），其接收估计的共模输出信号和来自第二反相放大器电路的输出信号，并输出第三和第四输出信号; 其中通过将第二输出信号和第四输出信号相加来产生估计的共模输出信号，以及接收估计的共模输出信号并将其馈送的第一和第二非反相放大器电路（A 5，A 6） 回到第一和第二反相放大器电路。

公开(公告)号：US06954089B2

公开(公告)日：2005-10-11

申请号：US10776199

申请日：2004-02-12

申请人： Toshiyuki Umeda ,  Shoji Otaka ,  Tetsuro Itakura

发明人： Toshiyuki Umeda ,  Shoji Otaka ,  Tetsuro Itakura

IPC分类号： H03D7/12 ,  H03D7/14 ,  H03L7/16 ,  H03B19/00

CPC分类号： H03D7/1441 ,  H03D7/1433 ,  H03D7/1458 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03D2200/0084

摘要： A frequency converter configured to convert a first current signal having a first frequency into a second current signal having a second frequency different from the first frequency is disclosed, which comprises an adder configured to add the first current signal and a predetermined reference current signal to output a third current signal corresponding to the sum of the first current signal and the reference current signal, and a switching circuit configured to pass only that portion of the third current signal which is larger in magnitude than a threshold current to output the second current signal.

摘要翻译： 公开了一种频率转换器，其被配置为将具有第一频率的第一电流信号转换成具有与第一频率不同的第二频率的第二电流信号，其包括加法器，其被配置为将第一电流信号和预定参考电流信号相加以输出 第三电流信号对应于第一电流信号和参考电流信号的和，以及开关电路，其被配置为仅通过大于阈值电流的第三电流信号的大小部分以输出第二电流信号。

公开(公告)号：US06806860B2

公开(公告)日：2004-10-19

申请号：US09964465

申请日：2001-09-28

申请人： Tetsuya Saito ,  Hironori Minamizaki ,  Tetsuro Itakura

发明人： Tetsuya Saito ,  Hironori Minamizaki ,  Tetsuro Itakura

IPC分类号： G09G336

CPC分类号： G09G3/3696 ,  G09G3/2011 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2330/021 ,  G09G2360/16

摘要： There is disclosed a liquid crystal driving circuit configured to supply an analog voltage in accordance with digital grayscale data to each of a plurality of signal lines, said circuit comprising: a reference voltage generation circuit configured to output analog reference voltages corresponding to each of said digital grayscale data; a plurality of buffer amplifiers configured to individually perform buffering of said respective analog reference voltages; a grayscale mode circuit configured to determine a grayscale number of said digital grayscale data based on a grayscale mode signal supplied from the outside; and an amplifier enable circuit configured to set each of said plurality of buffer amplifiers to an enable state or a disable state based on an output signal of said grayscale mode circuit.

摘要翻译： 公开了一种液晶驱动电路，其被配置为将数字灰度数据的模拟电压提供给多条信号线中的每条信号线，所述电路包括：参考电压产生电路，被配置为输出对应于每个所述数字 灰度数据; 多个缓冲放大器，被配置为单独地执行所述各个模拟参考电压的缓冲; 灰度模式电路，被配置为基于从外部提供的灰度模式信号来确定所述数字灰度数据的灰度数; 以及放大器使能电路，被配置为基于所述灰度级模式电路的输出信号将所述多个缓冲放大器中的每一个设置为使能状态或禁用状态。

公开(公告)号：US06549196B1

公开(公告)日：2003-04-15

申请号：US09401847

申请日：1999-09-22

申请人： Takashi Taguchi ,  Takeshi Shima ,  Tetsuro Itakura

发明人： Takashi Taguchi ,  Takeshi Shima ,  Tetsuro Itakura

IPC分类号： B09G500

CPC分类号： H03M1/0872 ,  G09G3/3688 ,  G09G2310/027 ,  H03M1/765

摘要： A D/A conversion circuit which can perform D/A conversion at high speed and with high precision is disclosed. The D/A conversion circuit comprises an analog reference power supply, an output buffer, a multiplexer, a pre-buffer, and a current changeover switch. The pre-buffer operates with a power supply voltage different from that of the analog reference power supply, and outputs a voltage substantially equal to an output voltage of the analog reference power supply. For a predetermined period after logic of digital data changes, the output voltage of the pre-buffer is supplied to the output buffer, and an input parasitic capacitor of the output buffer is charged/discharged. After the predetermined period elapses, the output voltage of the analog reference power supply is supplied to the output buffer. Therefore, a charging/discharging current of the input parasitic capacitor does not flow through the analog reference power supply, and fluctuation of the output voltage of the analog reference power supply can be suppressed.

摘要翻译： 公开了一种可以高速，高精度地执行D / A转换的D / A转换电路。 D / A转换电路包括模拟参考电源，输出缓冲器，多路复用器，预缓冲器和电流切换开关。 预缓冲器以与模拟基准电源不同的电源电压工作，并输出基本上等于模拟基准电源的输出电压的电压。 在数字数据的逻辑变化之后的预定时间内，预缓冲器的输出电压被提供给输出缓冲器，并且输出缓冲器的输入寄生电容器被充电/放电。 经过预定时间后，模拟基准电源的输出电压被提供给输出缓冲器。 因此，输入的寄生电容器的充电/放电电流不会流过模拟基准电源，并且可以抑制模拟基准电源的输出电压的波动。

公开(公告)号：US06498929B1

公开(公告)日：2002-12-24

申请号：US08880679

申请日：1997-06-23

申请人： Hiroshi Tsurumi ,  Hiroshi Yoshida ,  Tetsuro Itakura ,  Takafumi Yamaji ,  Akira Yasuda ,  Takashi Ueno ,  Hiroshi Tanimoto ,  Ryuichi Fujimoto ,  Hiroshi Horiguchi

发明人： Hiroshi Tsurumi ,  Hiroshi Yoshida ,  Tetsuro Itakura ,  Takafumi Yamaji ,  Akira Yasuda ,  Takashi Ueno ,  Hiroshi Tanimoto ,  Ryuichi Fujimoto ,  Hiroshi Horiguchi

IPC分类号： H04B716

CPC分类号： H03D3/008 ,  H03G3/3052 ,  H04B1/30

摘要： A receiver having a function of a direct current offset, and including a receiving section for receiving a radio frequency signal, an analog signal processing section for amplifying, band-converting and frequency-converting an analog signal inputted from the receiving section, and an AD converting section for converting an output of the analog signal processing section from an analog signal to a digital signal. Also included is a digital signal processing section for processing the digital signal converted by the DC converting section. The receiver further includes an offset detecting element, provided in the digital signal processing section, for detecting a direct current offset signal produced in the receiving section or a frequency converting section, an offset holding element, provided in the digital signal processing section, for holding the direct current offset signal detected by the offset detecting element, a DA converting section for converting the direct current offset signal detected by the digital signal processing section into an analog signal, and a first offset correcting element, provided in the analog signal processing section, for correcting the analog signal on the basis of the direct current offset signal converted by the DA converting section into the analog signal.

摘要翻译： 具有直流偏移功能的接收机，包括用于接收射频信号的接收部分，用于放大从接收部分输入的模拟信号的频带转换和频率转换的模拟信号处理部分，以及AD 转换部分，用于将模拟信号处理部分的输出从模拟信号转换成数字信号。 还包括用于处理由DC转换部分转换的数字信号的数字信号处理部分。 接收机还包括偏移检测元件，设置在数字信号处理部分中，用于检测在数字信号处理部分中设置的接收部分或频率转换部分产生的直流偏移信号，偏移保持元件，用于保持 由偏移检测元件检测的直流偏移信号，用于将由数字信号处理部分检测的直流偏移信号转换为模拟信号的DA转换部分和设置在模拟信号处理部分中的第一偏移校正元件， 用于基于由DA转换部分转换成的模拟信号的直流偏移信号来校正模拟信号。

公开(公告)号：US5995819A

公开(公告)日：1999-11-30

申请号：US755468

申请日：1996-11-22

申请人： Takafumi Yamaji ,  Osamu Watanabe ,  Hiroshi Tanimoto ,  Tetsuro Itakura ,  Shoji Otaka ,  Ryuichi Fujimoto

发明人： Takafumi Yamaji ,  Osamu Watanabe ,  Hiroshi Tanimoto ,  Tetsuro Itakura ,  Shoji Otaka ,  Ryuichi Fujimoto

IPC分类号： H03D7/00 ,  H03D7/14 ,  H04B1/00

CPC分类号： H03F3/45085 ,  H03D7/00 ,  H03D7/1408 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1475 ,  H03D2200/0007 ,  H03D2200/0025 ,  H03D2200/0047 ,  H03D2200/009

摘要： A frequency converter includes: a signal synthesizer element for inputting first and second input signals to synthesize these signals and for outputting a synthesized signal, from which noises even times as large as the frequency of the second input signal are removed; an amplitude limitation amplifier element, composed of a differential amplifier circuit, for amplifying the synthesized signal outputted from the signal synthesizer element to output an amplified signal having a constant amplitude; and a filter for inputting the amplified signal outputted from the amplitude limitation amplifier element, to remove an unnecessary signal component to produce an output a baseband signal including only a desired signal component. In addition, a radio receiver using the frequency converter of such a construction is designed to input the output of a local oscillator to a variable attenuator or a variable gain amplifier, to input the output of the variable attenuator or the variable gain amplifier as the first input signal to the frequency converter so as to perform the gain control. Thus, not only is self-mixing, a common problem in direct conversion receivers, prevented, but also, because a smaller local oscillation driving signal is required, power consumption is significantly reduced.

摘要翻译： 一种频率转换器，包括：信号合成器元件，用于输入第一和第二输入信号以合成这些信号并输出​​合成信号，从该信号合成信号除去除了第二输入信号的频率以上的噪声; 幅度限制放大器元件，由差分放大电路组成，用于放大从信号合成器元件输出的合成信号，以输出具有恒定幅度的放大信号; 以及滤波器，用于输入从幅度限制放大器元件输出的放大信号，以去除不必要的信号分量以产生仅包括所需信号分量的基带信号。 此外，使用这种结构的变频器的无线电接收机被设计成将本地振荡器的输出输入到可变衰减器或可变增益放大器，以将可变衰减器或可变增益放大器的输出作为第一 输入到变频器的信号，以进行增益控制。 因此，不仅自发混合，直接转换接收器中的常见问题被阻止，而且由于需要较小的本地振荡驱动信号，所以功耗显着降低。

公开(公告)号：US5608352A

公开(公告)日：1997-03-04

申请号：US362268

申请日：1994-12-22

申请人： Tetsuro Itakura

发明人： Tetsuro Itakura

IPC分类号： H03F1/32 ,  H03F3/45 ,  H03F3/68

CPC分类号： H03F3/45713 ,  H03F1/3211 ,  H03F3/45098 ,  H03F3/45112 ,  H03F3/45121 ,  H03F3/45183 ,  H03F3/45197 ,  H03F3/4521 ,  H03F3/45219 ,  H03F3/45565 ,  H03F2203/45371

摘要： A differential input circuit includes a first differential pair having first and second transistors for receiving a differential input signal, and for transmitting a differential output signal. A second differential pair includes third and fourth transistors commonly connected to an output of the first differential pair. A differential amplifier circuit includes a third differential pair having fifth and sixth transistors for inputting the differential input signal commonly with the first differential pair for generating a differential amplify signal which is supplied to the second differential pair; so that the potential of an output operating point is set to operate the third and fourth transistors of the second differential pair.

摘要翻译： 差分输入电路包括第一差分对，其具有用于接收差分输入信号的第一和第二晶体管，以及用于发送差分输出信号。 第二差分对包括共同连接到第一差分对的输出的第三和第四晶体管。 差分放大器电路包括具有第五和第六晶体管的第三差分对，所述晶体管用于与所述第一差分对共同地输入所述差分输入信号，以产生提供给所述第二差分对的差分放大信号; 使得输出工作点的电位被设置为操作第二差分对的第三和第四晶体管。

公开(公告)号：US5469092A

公开(公告)日：1995-11-21

申请号：US305471

申请日：1994-09-13

申请人： Tetsuro Itakura

发明人： Tetsuro Itakura

IPC分类号： H03F1/42 ,  G05F3/24 ,  G05F3/26 ,  H03F1/08 ,  H03F3/343 ,  H03F3/345 ,  H03F3/45 ,  H02M11/00

CPC分类号： H03F1/086 ,  G05F3/242 ,  G05F3/262 ,  H03F3/45076

摘要： An electronic circuit having a signal current reflection element, includes a low pass filter for limiting a bandwidth of a control signal which is supplied to a gate of a transistor to which at least an input current is flowing in a current mirror circuit as the signal current reflection element, and a feedforward signal path including a capacitance which is provided between an input terminal of the current mirror circuit and other terminal of the electronic circuit including the current mirror circuit. Accordingly, it is possible to provide the electronic circuit having a miniaturized circuit scale of the current mirror circuit without using a gate grounded circuit and a bias circuit thereof, and an elective high frequency characteristic.

摘要翻译： 具有信号电流反射元件的电子电路包括低通滤波器，用于限制提供给晶体管的至少一个输入电流在电流镜像电路中流动的晶体管的栅极的带宽，作为信号电流 反射元件和包括设置在电流镜电路的输入端子和包括电流镜电路的电子电路的其他端子之间的电容的前馈信号路径。 因此，可以在不使用栅极接地电路及其偏置电路的情况下提供具有电流镜电路的小型化电路规模的电子电路和选择性高频特性。

公开(公告)号：US5444413A

公开(公告)日：1995-08-22

申请号：US943493

申请日：1992-09-11

申请人： Tomohisa Kimura ,  Tetsuro Itakura

发明人： Tomohisa Kimura ,  Tetsuro Itakura

IPC分类号： H03F1/08 ,  H03F3/45 ,  H03K5/24 ,  H03K17/04

CPC分类号： H03F3/45188 ,  H03F1/086 ,  H03F2203/45024 ,  H03F2203/45052 ,  H03F2203/45201 ,  H03F2203/45612

摘要： An operational amplifier circuit includes a differential amplifier having an inverting input, a non-inverting input, and first and second outputs. The differential amplifier is fed by a current source coupled to a power supply voltage. An active load circuit is coupled to the first and second outputs of the differential amplifier and to a ground potential. An additional transistor is provided having a first current-carrying electrode coupled to the first output of the differential amplifier, a second current-carrying electrode coupled to the active load circuit, and an insulated gate electrode coupled to the active load circuit and the second output of the differential amplifier. An inversion amplifier has an input coupled to the second current-carrying electrode of the transistor, and an output, which is fed back through a compensation capacitor to the first output of the differential amplifier.

摘要翻译： 运算放大器电路包括具有反相输入，非反相输入以及第一和第二输出的差分放大器。 差分放大器由耦合到电源电压的电流源馈送。 有源负载电路耦合到差分放大器的第一和第二输出端并接地电位。 提供了附加晶体管，其具有耦合到差分放大器的第一输出的第一载流电极，耦合到有源负载电路的第二载流电极和耦合到有源负载电路和第二输出的绝缘栅电极 的差分放大器。 反相放大器具有耦合到晶体管的第二载流电极的输入端和通过补偿电容器反馈到差分放大器的第一输出的输出端。