公开(公告)号：US09064735B2

公开(公告)日：2015-06-23

申请号：US13198359

申请日：2011-08-04

申请人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

发明人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

IPC分类号： H01L27/115 ,  H01L21/822 ,  H01L27/06 ,  H01L27/105 ,  G11C16/04

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11578

摘要： A nonvolatile semiconductor memory device that has a new structure is provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device has a plurality of memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

摘要翻译： 提供了具有新结构的非易失性半导体存储器件，其中以三维状态层叠存储单元，从而可以减小芯片面积。 非易失性半导体存储器件具有串联连接有多个电可编程存储单元的多个存储器串。 存储器串包括柱形半导体; 形成在柱状半导体周围的第一绝缘膜; 形成在所述第一绝缘膜周围的电荷存储层; 形成在电荷存储层周围的第二绝缘膜; 并且形成在第二绝缘膜周围的第一或第n电极（n是大于1的自然数）。 存储器串的第一或第n电极和存储器串的其它第一或第n电极分别是以二维状态扩展的第一或第n导体层。

公开(公告)号：US08669608B2

公开(公告)日：2014-03-11

申请号：US13419984

申请日：2012-03-14

申请人： Mitsuru Sato ,  Megumi Ishiduki ,  Masaru Kidoh ,  Atsushi Konno ,  Yoshihiro Akutsu ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Ryota Katsumata

发明人： Mitsuru Sato ,  Megumi Ishiduki ,  Masaru Kidoh ,  Atsushi Konno ,  Yoshihiro Akutsu ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Ryota Katsumata

IPC分类号： H01L29/792

CPC分类号： H01L29/7926 ,  H01L21/265 ,  H01L27/11582 ,  H01L29/0676 ,  H01L29/66833

摘要： According to one embodiment, a method for manufacturing a nonvolatile semiconductor storage device includes; forming a first and a second stacked bodies; forming a through hole penetrating through the first stacked body, a second portion communicating with the first portion and penetrating through a select gate, and a third portion communicating with the second portion and penetrating through a second insulating layer; forming a memory film, a gate insulating film, and a channel body; forming a third insulating layer inside the channel body; forming a first embedded portion above a boundary portion inside the third portion; exposing the channel body by removing part of the first embedded portion and part of the third insulating layer in the third portion; and embedding a second embedded portion including silicon having higher impurity concentration than the first embedded portion above the first embedded portion inside the third portion.

摘要翻译： 根据一个实施例，一种用于制造非易失性半导体存储装置的方法包括： 形成第一和第二堆叠体; 形成穿过所述第一层叠体的通孔，与所述第一部分连通并穿过选择栅极的第二部分，以及与所述第二部分连通并穿透第二绝缘层的第三部分; 形成记忆膜，栅极绝缘膜和通道体; 在通道体内形成第三绝缘层; 在第三部分内部的边界部分上方形成第一嵌入部分; 通过去除第三部分中的第一嵌入部分和第三绝缘层的一部分的一部分来暴露通道体; 以及在所述第三部分内部嵌入包含比所述第一嵌入部分上方的所述第一嵌入部分杂质浓度高的硅的第二嵌入部分。

公开(公告)号：US08563926B2

公开(公告)日：2013-10-22

申请号：US13313387

申请日：2011-12-07

申请人： Mitsuru Yamada ,  Motohiro Nakamura ,  Mitsuru Sato

发明人： Mitsuru Yamada ,  Motohiro Nakamura ,  Mitsuru Sato

IPC分类号： H01J37/26 ,  G01N23/00 ,  G21K7/00

CPC分类号： H01J37/1471 ,  H01J37/222 ,  H01J37/28 ,  H01J2237/1501

摘要： A method of making axial alignment of a charged particle beam starts with obtaining at least first through sixth image data while controlling the focal position of the beam on a sample in the direction of incidence, the excitation current in a first alignment coil, and the excitation current in a second alignment coil. Then, values of the excitation currents in the first and second alignment coils for the axial alignment of the beam are calculated from the at least first through sixth image data.

摘要翻译： 使带电粒子束的轴向对准的方法从获得至少第一至第六图像数据开始，同时控制入射方向上的样品上的束的焦点位置，第一对准线圈中的激励电流和激发 电流在第二对准线圈中。 然后，从至少第一至第六图像数据计算用于光束的轴向对准的第一和第二对准线圈中的激励电流的值。

公开(公告)号：US08551838B2

公开(公告)日：2013-10-08

申请号：US13064559

申请日：2011-03-31

申请人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

发明人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

IPC分类号： H01L21/336 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11578

摘要： A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

摘要翻译： 提供了具有新结构的非易失性半导体存储器件，其中以三维状态层叠存储单元，从而可以减小芯片面积。 本发明的非易失性半导体存储装置是具有串联连接有多个电可编程存储单元的多个存储串的非易失性半导体存储装置。 存储器串包括柱形半导体; 形成在柱状半导体周围的第一绝缘膜; 形成在所述第一绝缘膜周围的电荷存储层; 形成在电荷存储层周围的第二绝缘膜; 并且形成在第二绝缘膜周围的第一或第n电极（n是大于1的自然数）。 存储器串的第一或第n电极和存储器串的其它第一或第n电极分别是以二维状态扩展的第一或第n导体层。

公开(公告)号：US20130003779A1

公开(公告)日：2013-01-03

申请号：US13518194

申请日：2010-12-24

申请人： Tsuguo Fukuda ,  Mitsuru Sato ,  Junichi Kojima ,  Yukinaga Koike

发明人： Tsuguo Fukuda ,  Mitsuru Sato ,  Junichi Kojima ,  Yukinaga Koike

IPC分类号： G01K11/22 ,  G01H13/00

CPC分类号： G01K7/32 ,  G01K1/024

摘要： There is provided a wireless measuring apparatus that efficiently measures the frequency characteristics of a sensor unit mounted on an object to be measured. The wireless measuring apparatus is a wireless measuring apparatus that measures the frequency characteristics of a sensor unit (10) mounted on an object (40) to be measured, including the sensor unit (10) having a piezo-resonator (11), an antenna (20) that forms a circuitry with the sensor unit (10), and a measuring element (30) that supplies high frequency electricity changed in different frequency to the circuitry and measures the frequency characteristics of the reflected electricity strength received from the circuitry.

摘要翻译： 提供了一种无线测量装置，其有效地测量安装在被测量物体上的传感器单元的频率特性。 无线测量装置是测量安装在待测物体（40）上的传感器单元（10）的频率特性的无线测量装置，包括具有压电谐振器（11）的传感器单元（10），天线 （20），其形成具有所述传感器单元（10）的电路;以及测量元件（30），其向所述电路提供以不同频率改变的高频电力并测量从所述电路接收的反射电力的频率特性。

公开(公告)号：US20120315450A1

公开(公告)日：2012-12-13

申请号：US13533521

申请日：2012-06-26

申请人： Takatoshi Yamamoto ,  Mitsuru Sato ,  Shintaro Asuke ,  Yoshiaki Mori ,  Kazuhiro Gomi

发明人： Takatoshi Yamamoto ,  Mitsuru Sato ,  Shintaro Asuke ,  Yoshiaki Mori ,  Kazuhiro Gomi

IPC分类号： B32B37/12 ,  B32B3/10 ,  B32B37/06

CPC分类号： C09J5/00 ,  C09J2205/31 ,  Y10T428/24851 ,  Y10T428/31663

摘要： A bonding method of bonding two base members together through a bonding film is provided. The bonding method is a method for forming a bonded body in which a first base member and a second base member are bonded together through the bonding film. The bonding method includes: applying a liquid material containing a silicone material composed of silicone compounds onto a surface of at least one of the first and second base members to form a liquid coating on the surface; drying the liquid coating so that it is transformed into the bonding film on the surface of the at least one of the first and second base members; and applying energy to the bonding film so that a bonding property is developed in the vicinity of a surface thereof, to thereby bond the first and second base members together through the bonding film.

摘要翻译： 提供了通过接合膜将两个基底部件接合在一起的接合方法。 接合方法是通过接合膜将第一基底构件和第二基底构件接合在一起的接合体的形成方法。 接合方法包括：将含有由硅氧烷化合物构成的硅酮材料的液体材料涂覆在第一和第二基底构件中的至少一个的表面上，以在表面上形成液体涂层; 干燥所述液体涂层，使其在所述第一和第二基底构件中的至少一个的表面上转变成粘结膜; 并且向接合膜施加能量，使得在其表面附近形成接合特性，从而通过接合膜将第一和第二基底部件结合在一起。

公开(公告)号：US20120217461A1

公开(公告)日：2012-08-30

申请号：US13404795

申请日：2012-02-24

申请人： Shigeki KOBAYASHI ,  Takashi Shigeoka ,  Mitsuru Sato ,  Takahiro Hirai ,  Katsuyuki Sekine ,  Kazuya Kinoshita ,  Soichi Yamazaki ,  Ryota Fujitsuka ,  Kensuke Takahashi ,  Yasuhiro Nojiri ,  Masaki Yamato ,  Hiroyuki Fukumizu ,  Takeshi Yamaguchi

发明人： Shigeki KOBAYASHI ,  Takashi Shigeoka ,  Mitsuru Sato ,  Takahiro Hirai ,  Katsuyuki Sekine ,  Kazuya Kinoshita ,  Soichi Yamazaki ,  Ryota Fujitsuka ,  Kensuke Takahashi ,  Yasuhiro Nojiri ,  Masaki Yamato ,  Hiroyuki Fukumizu ,  Takeshi Yamaguchi

IPC分类号： H01L45/00 ,  H01L21/8239 ,  B82Y99/00

CPC分类号： H01L27/2409 ,  B82Y10/00 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608

摘要： A semiconductor memory device according to an embodiment includes: first lines provided on a substrate; second lines provided between the first lines and the substrate so as to intersect the first lines; and a first memory cell array including first memory cells, each of the first memory cells being provided at respective intersections of the first lines and the second lines and including a current rectifying element and a variable resistor connected in series. The variable resistor of the first memory cell includes a first recording layer and a second recording layer, the first recording layer being made of an oxide of a first metal material, the second recording layer being made of the first metal material and being formed so as to contact with the first recording layer. The second recording layer is closer to the first line than the first recording layer is.

摘要翻译： 根据实施例的半导体存储器件包括：设置在基板上的第一线; 设置在第一线和基板之间以与第一线相交的第二线; 以及包括第一存储单元的第一存储单元阵列，每个第一存储单元设置在第一行和第二行的相应交点处，并且包括串联连接的电流整流元件和可变电阻器。 第一存储单元的可变电阻器包括第一记录层和第二记录层，第一记录层由第一金属材料的氧化物制成，第二记录层由第一金属材料制成并形成为 与第一记录层接触。 第二记录层比第一记录层更靠近第一行。

公开(公告)号：US08211259B2

公开(公告)日：2012-07-03

申请号：US12323562

申请日：2008-11-26

申请人： Mitsuru Sato ,  Takatoshi Yamamoto ,  Shintaro Asuke ,  Yoshiaki Mori ,  Kazuhiro Gomi

发明人： Mitsuru Sato ,  Takatoshi Yamamoto ,  Shintaro Asuke ,  Yoshiaki Mori ,  Kazuhiro Gomi

IPC分类号： B29C65/00

CPC分类号： B32B43/006 ,  B08B7/0057 ,  B09B5/00 ,  B32B37/06 ,  B32B2309/02 ,  B32B2309/105 ,  B32B2310/0831 ,  Y10T156/1153 ,  Y10T156/1158 ,  Y10T156/1911 ,  Y10T156/1917

摘要： A separating method of a bonded body, the bonded body including two base members and a bonding film through which the base members are boded together, enabling to easily and efficiently separating the bonded body into the two original base members is provided. Further, the bonding film contains a silicone material composed of silicone compounds. The separating method includes: preparing the bonded body with the bonding film; and applying energy for separation to the bonding film so that cleavage is generated within the bonding film due to breakage of a part of molecular bonds of the silicone compounds, to thereby separate the bonded body into the first and second base members.

摘要翻译： 提供了一种接合体的分离方法，所述粘合体包括两个基底构件和接合膜，通过该接合膜将基底构件接合在一起，使得能够容易且有效地将接合体分离成两个原始基底构件。 此外，接合膜含有由硅氧烷化合物构成的硅酮材料。 分离方法包括：用接合膜制备粘合体; 并将能量分离到接合薄膜上，使得由于硅酮化合物的分子键的一部分断裂而在接合薄膜内产生裂纹，从而将粘合体分离成第一和第二基底部件。

公开(公告)号：US20110287597A1

公开(公告)日：2011-11-24

申请号：US13064559

申请日：2011-03-31

申请人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

发明人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Akihiro Nitayama ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka ,  Mitsuru Sato

IPC分类号： H01L29/788

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11578

摘要： A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

摘要翻译： 提供了具有新结构的非易失性半导体存储器件，其中以三维状态层叠存储单元，从而可以减小芯片面积。 本发明的非易失性半导体存储装置是具有串联连接有多个电可编程存储单元的多个存储串的非易失性半导体存储装置。 存储器串包括柱形半导体; 形成在柱状半导体周围的第一绝缘膜; 形成在所述第一绝缘膜周围的电荷存储层; 形成在电荷存储层周围的第二绝缘膜; 并且形成在第二绝缘膜周围的第一或第n电极（n是大于1的自然数）。 存储器串的第一或第n电极和存储器串的其它第一或第n电极分别是以二维状态扩展的第一或第n导体层。

公开(公告)号：US08017984B2

公开(公告)日：2011-09-13

申请号：US12323006

申请日：2008-11-25

申请人： Yoshiaki Kitano ,  Hideshi Abe ,  Jun Kuroiwa ,  Kiyoshi Hirata ,  Hiroaki Ohki ,  Nobuhiro Karasawa ,  Ritsuo Takizawa ,  Mitsuru Yamashita ,  Mitsuru Sato ,  Katsunori Kokubun

发明人： Yoshiaki Kitano ,  Hideshi Abe ,  Jun Kuroiwa ,  Kiyoshi Hirata ,  Hiroaki Ohki ,  Nobuhiro Karasawa ,  Ritsuo Takizawa ,  Mitsuru Yamashita ,  Mitsuru Sato ,  Katsunori Kokubun

IPC分类号： H01L31/113 ,  H01L27/146

CPC分类号： H01L27/14601 ,  H01L27/14689 ,  H01L27/14806 ,  H04N5/335

摘要： A solid-state imaging device with a structure such that an electrode for reading a signal charge is provided on one side of a light-receiving sensor portion constituting a pixel; a predetermined voltage signal V is applied to a light-shielding film formed to cover an image pickup area except the light-receiving sensor portion; a second-conductivity-type semiconductor area is formed in the center on the surface of a first-conductivity-type semiconductor area constituting a photo-electric conversion area of the light-receiving sensor portion; and areas containing a lower impurity concentration than that of the second-conductivity-type semiconductor area is formed on the surface of the first-conductivity-type semiconductor area at the end on the side of the electrode and at the opposite end on the side of a pixel-separation area.

摘要翻译： 具有这样一种结构的固态成像装置，该结构使得用于读取信号电荷的电极设置在构成像素的光接收传感器部分的一侧; 将预定的电压信号V施加到形成为覆盖除了光接收传感器部分之外的图像拾取区域的遮光膜; 第二导电型半导体区域形成在构成光接收传感器部分的光电转换区域的第一导电型半导体区域的表面上的中心; 并且在第一导电型半导体区域的电极侧的端部的表面上形成比第二导电型半导体区域的杂质浓度低的区域， 像素分离区域。