-
公开(公告)号：US07929271B2
公开(公告)日：2011-04-19
申请号：US12298372
申请日：2007-04-26
申请人： Yoshikuni Kato , Katsuo Koizumi , Kanji Machida
发明人： Yoshikuni Kato , Katsuo Koizumi , Kanji Machida
摘要： A first electrode pattern comprises a first lead-out electrode portion extending continuously along the longitudinal direction of a first dielectric film, a plurality of first capacitor electrode portions each extending from the first lead-out electrode portion almost perpendicularly to the first lead-out electrode portion, and second capacitor electrode portions which are disposed between the first capacitor electrode portions and connected thereto. The second capacitor electrode portions each have a plurality of first sections. Each first section is connected to one end surface and the other end surface extending along the width direction of the first dielectric film of the first capacitor electrode portions through a narrow first fuse portion.
摘要翻译： 第一电极图案包括沿着第一电介质膜的纵向方向连续延伸的第一引出电极部分，多个第一电容器电极部分，每个第一电容器电极部分从第一引出电极部分几乎垂直于第一引出电极 部分和第二电容器电极部分，其设置在第一电容器电极部分之间并与之连接。 第二电容器电极部分各自具有多个第一部分。 每个第一部分连接到一个端面，另一个端面通过窄的第一熔丝部分沿着第一电容器电极部分的第一电介质膜的宽度方向延伸。
-
92.发明授权公开(公告)号：US07911802B2
公开(公告)日：2011-03-22
申请号：US11949795
申请日：2007-12-04
申请人： Shuichi Kawano , Liyi Chen
发明人： Shuichi Kawano , Liyi Chen
IPC分类号： H05K1/18
CPC分类号： H01G4/35 , H01G4/01 , H01G4/236 , H01L2224/16265 , H01L2924/15311 , H01L2924/157 , H01L2924/19011 , H01L2924/19041 , H01L2924/19103 , Y10T29/49165
摘要： An interposer including: a substrate including a first layer and second layer, wherein the first layer and second layer are positioned parallel to each other; electrodes each having a concave-convex structure formed on each facing surface of the first layer and second layer of the substrate; a dielectric layer sandwiched between the electrodes which are formed on each facing surface of the first layer and second layer of the substrate; a first conductive part which vertically passes through the first layer of the substrate from a first outer surface of the substrate and is electrically connected to an electrode formed on a surface of the second layer of the substrate that faces the first layer of the substrate; and a second conductive part which vertically passes through the second layer of the substrate from a second outer surface of the substrate and is electrically connected to an electrode formed on a surface of the first layer of the substrate that faces the second layer of the substrate.
摘要翻译： 一种插入器，包括：包括第一层和第二层的衬底，其中所述第一层和第二层彼此平行地定位; 每个具有形成在基板的第一层和第二层的每个相对表面上的凹凸结构的电极; 夹在电极之间的电介质层，其形成在基板的第一层和第二层的每个相对表面上; 第一导电部件，其从衬底的第一外表面垂直地穿过衬底的第一层，并且电连接到形成在衬底的面向衬底的第一层的第二层的表面上的电极; 以及第二导电部件，其从所述基板的第二外表面垂直地穿过所述基板的所述第二层，并且电连接到形成在所述基板的所述第一层的面向所述基板的第二层的表面上的电极。
-
公开(公告)号：US20100309608A1
公开(公告)日：2010-12-09
申请号：US12479810
申请日：2009-06-07
申请人： Chien-Wei Chang , Ting-Hao Lin , Ya-Hsiang Chen , Yu-Te Lu
发明人： Chien-Wei Chang , Ting-Hao Lin , Ya-Hsiang Chen , Yu-Te Lu
IPC分类号： H01M6/14
摘要： A buried capacitor structure including a first conductive metal layer, a first dielectric film, a capacitor, a second dielectric film, and a second conductive metal layer, which are stacked in sequence, wherein the capacitor is buried between the first dielectric film and the second dielectric film, the first conductive metal layer is formed into a first circuit pattern, the second conductive metal layer is formed into a second circuit pattern. The capacitor is a planar comb-shaped capacitor with a positive electrode, a negative electrode, and a capacitor paste filled between the positive electrode and the negative electrode, wherein the positive electrode includes a positive electrode end and a plurality of positive comb branches, the negative electrode includes a negative electrode end and a plurality of negative comb branches, and the positive branches and the negative branches are parallel to and separated from each other.
摘要翻译： 一种埋置电容器结构，其包括依次层叠的第一导电金属层，第一电介质膜，电容器，第二电介质膜和第二导电金属层，其中，所述电容器埋设在所述第一电介质膜和所述第二电介质膜之间 电介质膜，第一导电金属层形成为第一电路图案，第二导电金属层形成第二电路图案。 电容器是具有正极，负极和填充在正极和负极之间的电容器浆料的平面梳状电容器，其中正极包括正极端和多个正梳分支， 负极包括负极端和多个负梳分支，并且正分支和负分支彼此平行并分离。
-
94.发明申请Embedded capacitor, embedded capacitor sheet using the same and method of manufacturing the same 有权嵌入式电容器，嵌入式电容器片采用相同的制造方法公开(公告)号：US20100271748A1
公开(公告)日：2010-10-28
申请号：US12453635
申请日：2009-05-18
申请人： Jung Rag Yoon , Kyung Min Lee , Jeong Woo Han
发明人： Jung Rag Yoon , Kyung Min Lee , Jeong Woo Han
CPC分类号： H01G4/33 , H01G4/01 , H01G4/1209 , H01G4/1218 , H05K1/162 , H05K2201/0195 , H05K2201/0209 , H05K2201/0257 , H05K2201/0373 , H05K2203/135
摘要： Provided are an embedded capacitor, an embedded capacitor sheet using the embedded capacitor, and a method of manufacturing the same that may increase a surface area to thereby increase a capacity for each unit area and may provide an embedded capacitor in a sheet to thereby readily lay the embedded capacitor on an embedded printed circuit board. The embedded capacitor may include: a common electrode member 11 including a plurality of grooves 11a; a sealing dielectric layer 12 being formed by sealing a nano dielectric powder with a high dielectric constant in the plurality of grooves 11a formed in the common electrode member 11; a buffer dielectric layer 13 sealing and smoothing an uneven portion of the sealing dielectric layer 12 by applying a paste or a slurry including epoxy of 20 Vol % through 80 Vol % and dielectric powder of 20 Vol % through 80 Vol % with respect to the sealing dielectric layer 12; and an individual electrode member 14 being formed on the buffer dielectric layer 13.
摘要翻译： 提供了嵌入式电容器，使用嵌入式电容器的嵌入式电容器片及其制造方法，其可以增加表面积从而增加每个单位面积的容量，并且可以在片材中提供嵌入式电容器，从而容易地铺设 嵌入式电路板上的嵌入式电容器。 嵌入式电容器可以包括：公共电极构件11，其包括多个槽11a; 密封电介质层12通过在形成在公共电极构件11中的多个槽11a中密封具有高介电常数的纳米介电粉末而形成; 缓冲电介质层13，通过将包含20体积％〜80体积％的环氧树脂的糊剂或包含20体积％〜80体积％的电介质粉末的密封，密封介质层12的不均匀部分密封并平滑， 电介质层12; 以及形成在缓冲介电层13上的单独电极部件14。
-
公开(公告)号：US20100142119A1
公开(公告)日：2010-06-10
申请号：US12571769
申请日：2009-10-01
申请人： Yu-Shin RYU
发明人： Yu-Shin RYU
IPC分类号： H01G4/06
CPC分类号： H01G4/33 , H01G4/01 , H01G4/232 , H01L23/5223 , H01L28/75 , H01L28/90 , H01L2924/0002 , H01L2924/00
摘要： A capacitor structure includes: a first electrode configured to include a plurality of openings; a second electrode formed in each center of the openings; and a dielectric layer formed to surround the second electrode and fill the openings of the first electrode.
摘要翻译： 电容器结构包括：第一电极，被配置为包括多个开口; 形成在所述开口的每个中心的第二电极; 以及形成为围绕第二电极并填充第一电极的开口的电介质层。
-
公开(公告)号：US20100118465A1
公开(公告)日：2010-05-13
申请号：US11679580
申请日：2007-02-27
申请人： Shinzo Onishi , L.C. Langebrake
发明人： Shinzo Onishi , L.C. Langebrake
CPC分类号： H01L28/60 , H01G4/01 , H01G4/33 , H01L27/0203 , H01L28/40 , H01L28/75 , H01L29/66181
摘要： In accordance with the present invention, a novel method to fabricate topological capacitors is provided. The fabrication method of the instant invention is based upon a reversed surface topology utilizing deep reactive ion etching to establish conductive capacitive elements and non-conductive capacitive element groups.
摘要翻译： 根据本发明，提供一种制造拓扑电容器的新方法。 本发明的制造方法基于利用深反应离子蚀刻来建立导电电容元件和非导电电容元件组的反向表面拓扑。
-
公开(公告)号：US20090244809A1
公开(公告)日：2009-10-01
申请号：US12457296
申请日：2009-06-05
申请人： Hajime Kuwajima , Masahiro Miyazaki , Akira Furuya
发明人： Hajime Kuwajima , Masahiro Miyazaki , Akira Furuya
CPC分类号： H01G4/33 , H01G4/01 , H05K1/162 , H05K3/244 , H05K2201/0179 , H05K2201/0347 , Y10T29/435
摘要： A thin-film device includes a substrate, and a capacitor provided on the substrate. The capacitor incorporates a lower conductor layer having a top surface and a side surface; a flattening film disposed to cover the top and side surfaces of the lower conductor layer; a dielectric film disposed on the flattening film; and an upper conductor layer disposed on the dielectric film. The lower conductor layer is composed of an electrode film and a plating film disposed on the electrode film. The dielectric film has a thickness that falls within a range of 0.02 to 1 μm inclusive and that is smaller than a thickness of the lower conductor layer. A surface roughness in maximum height of a top surface of the flattening film is smaller than that of the top surface of the lower conductor layer and equal to or smaller than the thickness of the dielectric film.
摘要翻译： 薄膜器件包括衬底和设置在衬底上的电容器。 电容器包括具有顶表面和侧表面的下导体层; 布置成覆盖下导体层的顶表面和侧表面的平坦化膜; 设置在平坦化膜上的电介质膜; 以及设置在电介质膜上的上导体层。 下导体层由设置在电极膜上的电极膜和镀膜构成。 电介质膜的厚度为0.02〜1μm的范围，小于下导体层的厚度。 平坦化膜的上表面的最大高度的表面粗糙度小于下导体层的上表面的表面粗糙度，并且等于或小于电介质膜的厚度。
-
98.发明申请公开(公告)号：US20080247116A1
公开(公告)日：2008-10-09
申请号：US11949795
申请日：2007-12-04
申请人： Shuichi KAWANO , Liyi Chen
发明人： Shuichi KAWANO , Liyi Chen
CPC分类号： H01G4/35 , H01G4/01 , H01G4/236 , H01L2224/16265 , H01L2924/15311 , H01L2924/157 , H01L2924/19011 , H01L2924/19041 , H01L2924/19103 , Y10T29/49165
摘要： An interposer including: a substrate including a first layer and second layer, wherein the first layer and second layer are positioned parallel to each other; electrodes each having a concave-convex structure formed on each facing surface of the first layer and second layer of the substrate; a dielectric layer sandwiched between the electrodes which are formed on each facing surface of the first layer and second layer of the substrate; a first conductive part which vertically passes through the first layer of the substrate from a first outer surface of the substrate and is electrically connected to an electrode formed on a surface of the second layer of the substrate that faces the first layer of the substrate; and a second conductive part which vertically passes through the second layer of the substrate from a second outer surface of the substrate and is electrically connected to an electrode formed on a surface of the first layer of the substrate that faces the second layer of the substrate.
摘要翻译： 一种插入器，包括：包括第一层和第二层的衬底，其中所述第一层和第二层彼此平行地定位; 每个具有形成在基板的第一层和第二层的每个相对表面上的凹凸结构的电极; 夹在电极之间的电介质层，其形成在基板的第一层和第二层的每个相对表面上; 第一导电部件，其从衬底的第一外表面垂直地穿过衬底的第一层，并且电连接到形成在衬底的面向衬底的第一层的第二层的表面上的电极; 以及第二导电部件，其从所述基板的第二外表面垂直地穿过所述基板的所述第二层，并且电连接到形成在所述基板的所述第一层的面向所述基板的第二层的表面上的电极。
-
公开(公告)号：US20080170346A1
公开(公告)日：2008-07-17
申请号：US11624157
申请日：2007-01-17
CPC分类号： H01G4/01 , H01G4/06 , H01G4/12 , Y10T29/417
摘要： An in-line capacitor, having a pair of inner conductor segments, each of the inner conductor segments having a mating surface. A dielectric spacer positioned between the mating surfaces, each of the mating surfaces having corresponding folds formed thereon.
摘要翻译： 具有一对内部导体段的在线电容器，每个内部导体段具有配合表面。 定位在配合表面之间的电介质间隔件，每个配合表面上形成相应的折痕。
-
100.发明授权公开(公告)号：US07297613B1
公开(公告)日：2007-11-20
申请号：US11149029
申请日：2005-06-09
IPC分类号： H01L21/45
摘要： Method of making an integrated passive, such as a high quality decoupling capacitor, includes providing a first temporary support, a silicon capacitor wafer, and providing an oxide layer and a conductive layer on it. Then, a second temporary support, such as a handle wafer, may be attached to the capacitor wafer (i.e., to the oxide layer on it) by an adhesive bond. The capacitor wafer may then be destructively removed. A second conductive layer is then provided on an exposed backside of the oxide layer. The addition of a second electrode on the second conductive layer yields the desired high quality capacitor. Further processing steps, such as solder bumping, may be carried out while the capacitor wafer is still attached to the handle wafer. When the desired processing steps are complete, the handle wafer is removed, and the relatively thin high quality integrated capacitor wafer results.
摘要翻译： 制造集成无源（例如高质量去耦电容器）的方法包括提供第一临时支撑件，硅电容器晶片，并在其上提供氧化物层和导电层。 然后，诸如手柄晶片的第二临时支撑件可以通过粘合剂粘结附接到电容器晶片（即，其上的氧化物层）。 然后电容器晶片可以被破坏性地去除。 然后在氧化物层的暴露的背面上提供第二导电层。 在第二导电层上添加第二电极产生期望的高质量电容器。 可以在电容器晶片仍然附着到处理晶片的同时进行诸如焊料凸起的其他处理步骤。 当所需的处理步骤完成时，去除处理晶片，并且产生相对薄的高质量集成电容器晶片。
-
-
-
-
-
-
-
-
-
搜索结果
297 条记录 (耗时 0.018 秒)
