公开(公告)号：US5939822A

公开(公告)日：1999-08-17

申请号：US914291

申请日：1997-08-18

Applicant: Richard K. Alderson

Inventor： Richard K. Alderson

IPC: H01J29/02 ,  H01J29/86 ,  H01J31/12 ,  H01J1/62

CPC classification number: H01J31/123 ,  H01J29/864 ,  H01J31/127 ,  H01J2201/025 ,  H01J2201/30403 ,  H01J2329/863 ,  H01J2329/8635 ,  H01J2329/864 ,  H01J2329/8645

Abstract: A support structure is provided that enables the use of high-voltage phosphors in field-emission flat panel displays, to maintain the vacuum gap between the cathode and the anode at a constant distance and to prevent distortion of the transparent view screen and backing plate of the display. A number of independent techniques each contributes to the solution of the problem of secondary electron emission. One technique is to alter the geometry of the triple junction of the support structure, the cathode, and the vacuum gap, thereby reducing the electrostatic field created at the triple junction. Reducing the electrostatic field reduces the initial primary electron bombardment originating at the triple junction. Altering the geometry of the support surface with respect to the field lines present at the triple junction also increases the probability that impinging electrons will impact at or nearly at right angles, and will also tend to be directed by the field lines back into the "pocket" created by the shaping of the support structure edge, preventing secondary electrons from escaping and traveling along the structure surface to the anode. In accordance with another technique, the support structure is fluted so as to reduce the average coefficient of secondary electron emission, to trap a proportion of secondary electrons, and to limit the number of hops of other secondary electrons. In another technique, a high resistivity conductive layer is formed at the triple junction in order to reduce the field potential at the triple junction. A similar conductive layer may be formed at the opposite junction of the support structure, the anode, and the vacuum gap. A high resistivity conductive material coated on the surface of the insulating spacer can be used to decrease the charge relaxation time of the insulator, thereby maintaining a constant field potential over the surface of the insulator, reducing areas of high field potential which will tend to accelerate secondary electron emissions. In accordance with other techniques, the support structure is made of a non-porous material and may be coated with a coating having low secondary emission characteristics.

公开(公告)号：US5913704A

公开(公告)日：1999-06-22

申请号：US855425

申请日：1997-05-12

Applicant: Christopher J. Spindt ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Peter C. Searson

Inventor： Christopher J. Spindt ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Peter C. Searson

IPC: H01J1/30 ,  H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J29/04 ,  H01J31/12

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319

Abstract: Gated electron emitters are fabricated by processes in which charged particles are passed through a track layer (24, 48, or 144) to form charged-particle tracks (26.sub.1, 50.sub.1, or 146.sub.1). The track layer is etched along the tracks to create open spaces (28.sub.1, 52.sub.1, or 148.sub.1). Electron-emissive elements (30 or 142D) can then be formed at locations respectively centered on the open spaces after which a patterned gate layer (34B, 40B, or 158C) is provided. Alternatively, the open spaces in the track layer can be employed to etch corresponding apertures (54.sub.1) through an underlying non-insulating layer (46) which typically serves as the gate layer. An etch is performed through the apertures to form dielectric open spaces (56.sub.1, 96.sub.1, or 114.sub.1) in an insulating layer (24) that lies below the non-insulating layer. Electron-emissive elements (30B, 30/88D.sub.1, 98/102.sub.1, or 118.sub.1) can subsequently be provided, typically in the dielectric open spaces.

Abstract translation: 门电子发射器通过其中带电粒子通过轨道层（24,48或144）以形成带电粒子轨道（261,501或1461）的工艺制造。 轨道层沿着轨道被蚀刻以创建开放空间（281,521或1481）。 然后可以在分开以开放空间为中心的位置处形成电子发射元件（30或142D），之后设置图案化栅极层（34B，40B或158C）。 或者，轨道层中的开放空间可用于通过通常用作栅极层的下面的非绝缘层（46）蚀刻相应的孔（541）。 通过孔进行蚀刻，以在位于非绝缘层下方的绝缘层（24）中形成介电开放空间（561,961或1141）。 随后可以提供电子发射元件（30B，30 / 88D1,98 / 1011或1181），通常在电介质开放空间中。

公开(公告)号：US5860844A

公开(公告)日：1999-01-19

申请号：US962735

申请日：1997-11-03

Applicant: Masato Susukida ,  Jun Hagiwara ,  Katsuto Nagano

Inventor： Masato Susukida ,  Jun Hagiwara ,  Katsuto Nagano

IPC: H01J1/304 ,  H01J9/02

CPC classification number: H01J9/025 ,  H01J1/3042 ,  H01J2201/30403 ,  H01J2201/30457

Abstract: A cold cathode electron source element having a cold cathode on a substrate. The cold cathode has dispersed in a cold cathode base particles of a conductive material having a lower work function than the base and a particle size which is sufficiently smaller than the thickness of the cold cathode. The element can be driven with a low voltage to induce high emission current in a stable manner. The cold cathode is easily processable. The element can have an increased surface area.

Abstract translation: 在基板上具有冷阴极的冷阴极电子源元件。 冷阴极已经分散在具有比碱低的功函数的导电材料的冷阴极基体颗粒中，并且其粒径足够小于冷阴极的厚度。 元件可以用低电压驱动，以稳定的方式感应高发射电流。 冷阴极易于加工。 元件可以具有增加的表面积。

公开(公告)号：US5847504A

公开(公告)日：1998-12-08

申请号：US690895

申请日：1996-08-01

Applicant: Livio Baldi

Inventor： Livio Baldi

IPC: G09G3/22 ,  H01J1/304 ,  H01J31/12 ,  H01J1/62 ,  H01J1/02 ,  H01J1/16 ,  H01J63/04

CPC classification number: G09G3/22 ,  H01J1/3042 ,  H01J31/127 ,  H01J2201/30403 ,  H01J2201/319 ,  H01J2329/00

Abstract: A pixel emission current limiting resistance is realized by forming a stack of alternately doped amorphous or polycrystalline silicon layers over the cathodic conductors of a FED driving matrix. The stack of amorphous or polycrystalline silicon layers doped alternately n and p provides at least a reversely biased n/p junction having a leakage current that matches the required level of pixel emission current. The reversely biased junction constitutes a nonlinear series resistance that is quite effective in limiting the emission current through any one of the microtips that form an individually excitable pixel and which are formed on the uppermost layer of the stack.

Abstract translation: 通过在FED驱动矩阵的阴极导体上形成交替掺杂的非晶或多晶硅层的堆叠来实现像素发射电流限制电阻。 掺杂交替地n和p的非晶或多晶硅层的堆叠提供至少一个具有与所要求的像素发射电流水平匹配的漏电流的反向偏置n / p结。 反向偏置的结构成非线性串联电阻，其非常有效地限制通过形成可单独激发的像素并且形成在堆叠的最上层上的任何一个微尖端的发射电流。

公开(公告)号：US5827099A

公开(公告)日：1998-10-27

申请号：US568885

申请日：1995-12-07

Applicant: Christopher J. Spindt ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Peter C. Searson

Inventor： Christopher J. Spindt ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Peter C. Searson

IPC: H01J1/30 ,  H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J29/04 ,  H01J31/12

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319

Abstract: Gated electron emitters are fabricated by processes in which charged particles are passed through a track layer (24, 48, or 144) to form charged-particle tracks (26.sub.1, 50.sub.1, or 146.sub.1). The track layer is etched along the tracks to create open spaces (28.sub.1, 52.sub.1, or 148.sub.1). Electron-emissive elements (30 or 142D) can then be formed at locations respectively centered on the open spaces after which a patterned gate layer (34B, 40B, or 158C) is provided. Alternatively, the open spaces in the track layer can be employed to etch corresponding apertures (54.sub.1) through an underlying non-insulating layer (46) which typically serves as the gate layer. An etch is performed through the apertures to form dielectric open spaces (56.sub.1, 96.sub.1, or 114.sub.1) in an insulating layer (24) that lies below the non-insulating layer. Electron-emissive elements (30B, 30/88D.sub.1, 98/102.sub.1, or 118.sub.1) can subsequently be provided, typically in the dielectric open spaces.

Abstract translation: 门电子发射器通过其中带电粒子通过轨道层（24,48或144）以形成带电粒子轨道（261,501或1461）的工艺制造。 轨道层沿着轨道被蚀刻以创建开放空间（281,521或1481）。 然后可以在分开以开放空间为中心的位置处形成电子发射元件（30或142D），之后设置图案化栅极层（34B，40B或158C）。 或者，轨道层中的开放空间可用于通过通常用作栅极层的下面的非绝缘层（46）蚀刻相应的孔（541）。 通过孔进行蚀刻，以在位于非绝缘层下方的绝缘层（24）中形成介电开放空间（561,961或1141）。 随后可以提供电子发射元件（30B，30 / 88D1,98 / 1011或1181），通常在电介质开放空间中。

公开(公告)号：US5777427A

公开(公告)日：1998-07-07

申请号：US539699

申请日：1995-10-05

Applicant: Hiroyoshi Tanaka ,  Koichi Kotera ,  Masao Uchida

Inventor： Hiroyoshi Tanaka ,  Koichi Kotera ,  Masao Uchida

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/02

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2329/00

Abstract: An electron emission cathode includes: an n-type semiconductor film including diamond particles partially projecting from a surface of the n-type semiconductor film; and an anode opposing the n-type semiconductor film with a vacuum interposed therebetween. Electrons are emitted by applying a voltage between the anode and the n-type semiconductor film.

Abstract translation: 电子发射阴极包括：n型半导体膜，包括从n型半导体膜的表面部分地突出的金刚石颗粒; 以及与之间的真空相对的n型半导体膜的阳极。 通过在阳极和n型半导体膜之间施加电压来发射电子。

公开(公告)号：US5760536A

公开(公告)日：1998-06-02

申请号：US347133

申请日：1994-11-23

Applicant: Masato Susukida ,  Jun Hagiwara ,  Katsuto Nagano

Inventor： Masato Susukida ,  Jun Hagiwara ,  Katsuto Nagano

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/30

CPC classification number: H01J9/025 ,  H01J1/3042 ,  H01J2201/30403 ,  H01J2201/30457

Abstract: A cold cathode electron source element having a cold cathode on a substrate. The cold cathode has dispersed in a cold cathode base particles of a conductive material having a lower work function than the base and a particle size which is sufficiently smaller than the thickness of the cold cathode. The element can be driven with a low voltage to induce high emission current in a stable manner. The cold cathode is easily processable. The element can have an increased surface area.

Abstract translation: 在基板上具有冷阴极的冷阴极电子源元件。 冷阴极已经分散在具有比碱低的功函数的导电材料的冷阴极基体颗粒中，并且其粒径足够小于冷阴极的厚度。 元件可以用低电压驱动，以稳定的方式感应高发射电流。 冷阴极易于加工。 元件可以具有增加的表面积。

公开(公告)号：US5739522A

公开(公告)日：1998-04-14

申请号：US705250

申请日：1996-08-29

Applicant: Donald R. Ouimette

Inventor： Donald R. Ouimette

IPC: H01J31/28 ,  H01J31/26 ,  H01J31/38 ,  H01J31/49 ,  H01J40/14

CPC classification number: H01J31/26 ,  H01J31/38 ,  H01J2201/304 ,  H01J2201/30403 ,  H01J2231/50036 ,  H01J2231/50068

Abstract: A flat panel image sensor is provided by combining the photoconductive imaging electrode of a vidicon with a two dimensional array of cold cathode field emitters commonly used for flat panel Field Emission Display (FED) systems. The FED operates normally to emit electrons which are accelerated in prior art displays towards a luminescent phosphor to generate light output proportional to the cathode emission. Rather than accelerating towards a phosphor, electrons, in accordance with the principles of this invention, are accelerated towards a photoconductor layer to replace charge removed from the layer by an incident radiation pattern directed at the photoconductor layer through a layer of transparant, electrically-conducting material which serves as a radiation window. A large area, low cost, small, flat panel sensor is realized. The transparant, electrically-conducting layer may be partitioned to reduce stray capacitance for large area sensors and the partitioned, electrically-conducting layer permits a parallel readout mode of operation. The sensor includes a means for collimating and focusing the electron beams and may be used with infra red and ultra violet photoconductor materials.

Abstract translation: 通过组合摄像机的光导成像电极和通常用于平板场发射显示（FED）系统的冷阴极场发射器的二维阵列来提供平板图像传感器。 FED正常工作以发射在现有技术显示器中朝向发光荧光体加速的电子，以产生与阴极发射成比例的光输出。 不是朝向磷光体加速，而是依照本发明的原理将电子加速到光电导体层，以通过指向光电导体层的入射辐射图形来替代从层移除的电荷，该层通过透明层，导电 用作辐射窗的材料。 实现了大面积，低成本，小型，平板传感器。 透明导电层可以被分隔以减小大面积传感器的杂散电容，并且分隔的导电层允许并行读出操作模式。 传感器包括用于准直和聚焦电子束的装置，并可与红外和紫外光电导体材料一起使用。

公开(公告)号：US5717286A

公开(公告)日：1998-02-10

申请号：US648765

申请日：1996-05-16

Applicant: Shigeo Itoh ,  Teruo Watanabe ,  Tatsuo Yamaura ,  Takeshi Tonegawa ,  Takahiro Niiyama ,  Yuji Nomura

Inventor： Shigeo Itoh ,  Teruo Watanabe ,  Tatsuo Yamaura ,  Takeshi Tonegawa ,  Takahiro Niiyama ,  Yuji Nomura

IPC: H01J29/86 ,  H01J29/08 ,  H01J29/88 ,  H01J31/12 ,  H01J1/62 ,  H01J29/10

CPC classification number: H01J29/085 ,  H01J31/127 ,  H01J2201/30403 ,  H01J2329/28

Abstract: Electron excited luminous element capable of ensuring satisfactory emission characteristics of emitters for an extended period of time. A hydrophobic insulating film is formed on a glass anode substrate so as to cover an exposed portion thereof between anode electrodes. This keeps the glass anode substrate from being directly attacked by electrons, to thereby prevent decomposition of water and the like contained in a surface of the glass, resulting in oxygen which causes deterioration in emission characteristics of emitter cones being kept from being released from the glass.

Abstract translation: 电子激发发光元件能够长时间确保发射体的令人满意的发光特性。 在玻璃阳极基板上形成疏水绝缘膜，以覆盖阳极电极之间的露出部分。 这样可以使玻璃阳极基板不受电子的直接攻击，从而防止玻璃表面含有的水等的分解，导致发射体锥体的发射特性劣化的氧气不被从玻璃体释放出来 。

公开(公告)号：US5676578A

公开(公告)日：1997-10-14

申请号：US606830

申请日：1996-02-26

Applicant: David Nan-Chou Liu

Inventor： David Nan-Chou Liu

IPC: H01J3/02 ,  H01J29/08 ,  H01J31/12 ,  H01J1/30 ,  H01J9/18 ,  H01J9/227

CPC classification number: H01J29/085 ,  H01J3/022 ,  H01J31/127 ,  H01J2201/30403 ,  H01J2329/00

Abstract: Described are methods for making, and resultant structures of, a field emission display with soft luminescence and a comfortable image for a viewer of the display. The field emission display is formed with a baseplate and an opposing face plate. Field emission microtips are formed in openings in a conductive and insulating layer on the baseplate. An anode is formed on either the faceplate, or on the conductive layer surrounding each opening. Phosphorescent material is formed over the anode. A blocking layer is formed between the phosphor and the faceplate, such that during operation of the display direct light emission from the phosphor is blocked, resulting in indirect phosphorescence and a more comfortable display image. An optional reflective layer may be added over the conductive layer to increase phosphorescence.

Abstract translation: 描述了用于制造具有软发光的场致发射显示和用于显示器的观看者的舒适图像的结果的方法。 场发射显示器形成有基板和相对的面板。 场致发射微尖端形成在基板上的导电绝缘层的开口中。 在面板上或在围绕每个开口的导电层上形成阳极。 在阳极上形成磷光材料。 在荧光体和面板之间形成阻挡层，使得在显示器的操作期间，来自磷光体的直接发光被阻挡，导致间接磷光和更舒适的显示图像。 可以在导电层上添加可选的反射层以增加磷光。