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    Semiconductor element, semiconductor device, and semiconductor element manufacturing method
    1.
    发明授权
    Semiconductor element, semiconductor device, and semiconductor element manufacturing method 有权
    半导体元件，半导体器件和半导体元件制造方法

    公开(公告)号：US08878194B2

    公开(公告)日：2014-11-04

    申请号：US14001027

    申请日：2012-09-03

    申请人： Masahiko Niwayama ,  Masao Uchida

    发明人： Masahiko Niwayama ,  Masao Uchida

    IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L21/04

    CPC分类号： H01L29/1608 ,  H01L21/046 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/66068 ,  H01L29/7828

    摘要： A method for fabricating a semiconductor element according to the present disclosure includes the steps of: (A) forming a first silicon carbide semiconductor layer of a first conductivity type on a semiconductor substrate; (B) forming a first mask to define a body region on the first silicon carbide semiconductor layer; (C) forming a body implanted region of a second conductivity type in the first silicon carbide semiconductor layer using the first mask; (D) forming a sidewall on side surfaces of the first mask; (E) defining a dopant implanted region of the first conductivity type and a first body implanted region of the second conductivity type in the first silicon carbide semiconductor layer using the first mask and the sidewall; and (F) thermally treating the first silicon carbide semiconductor layer.

    摘要翻译： 根据本公开的制造半导体元件的方法包括以下步骤：（A）在半导体衬底上形成第一导电类型的第一碳化硅半导体层; （B）形成第一掩模以在第一碳化硅半导体层上限定体区; （C）使用所述第一掩模在所述第一碳化硅半导体层中形成第二导电类型的体注入区域; （D）在第一掩模的侧表面上形成侧壁; （E）使用第一掩模和侧壁在第一碳化硅半导体层中限定第一导电类型的掺杂剂注入区和第二导电类型的第一体注入区; 和（F）对第一碳化硅半导体层进行热处理。

    Semiconductor chip with linear expansion coefficients in direction parallel to sides of hexagonal semiconductor substrate and manufacturing method
    3.
    发明授权
    Semiconductor chip with linear expansion coefficients in direction parallel to sides of hexagonal semiconductor substrate and manufacturing method 有权
    具有与六边形半导体衬底的侧面平行的方向的线性膨胀系数的半导体芯片及其制造方法

    公开(公告)号：US08575729B2

    公开(公告)日：2013-11-05

    申请号：US13579432

    申请日：2011-05-13

    申请人： Masao Uchida ,  Masashi Hayashi

    发明人： Masao Uchida ,  Masashi Hayashi

    IPC分类号： H01L21/78 ,  H01L29/04

    CPC分类号： H01L29/7827 ,  H01L27/0207 ,  H01L29/045 ,  H01L29/66068 ,  H01L29/808 ,  H01L29/812 ,  H01L29/861

    摘要： The semiconductor chip (18) of the present invention is a semiconductor chip (18) on which a power semiconductor device (10) is formed, and which includes a semiconductor substrate made from a hexagonal semiconductor, in which the semiconductor substrate has a shape of a rectangle on a principal surface, in which the rectangle is defined by two sides having lengths a and b equal to each other, and in which linear expansion coefficients in directions parallel to the two sides of the semiconductor substrate are equal to each other.

    摘要翻译： 本发明的半导体芯片（18）是形成功率半导体器件（10）的半导体芯片（18），其包括由六边形半导体制成的半导体衬底，其中半导体衬底具有 在主表面上的矩形，其中矩形由具有彼此相等的长度a和b的两边限定，并且其中平行于半导体衬底的两侧的方向上的线性膨胀系数彼此相等。

    Semiconductor element and manufacturing method therefor
    4.
    发明授权
    Semiconductor element and manufacturing method therefor 有权
    半导体元件及其制造方法

    公开(公告)号：US08563988B2

    公开(公告)日：2013-10-22

    申请号：US13878742

    申请日：2011-10-27

    申请人： Masao Uchida ,  Koutarou Tanaka

    发明人： Masao Uchida ,  Koutarou Tanaka

    IPC分类号： H01L21/00

    CPC分类号： H01L21/26506 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7828

    摘要： As viewed along a normal to the principal surface of a substrate 101, this semiconductor element 100 has a unit cell region 100ul and a terminal region 100f located between the unit cell region and an edge of the semiconductor element. The terminal region 100f includes a ring region 103f of a second conductivity type which is arranged in a first silicon carbide semiconductor layer 102 so as to contact with a drift region 102d. The ring region includes a high concentration ring region 103af which contacts with the surface of the first silicon carbide semiconductor layer and a low concentration ring region 103bf which contains an impurity of the second conductivity type at a lower concentration than in the high concentration ring region and of which the bottom contacts with the first silicon carbide semiconductor layer. A side surface of the high concentration ring region 103af contacts with the drift region 102d. As viewed along a normal to the principal surface of the semiconductor substrate, the high concentration ring region and the low concentration ring region are identical in contour.

    摘要翻译： 沿着基板101的主表面的法线观察，该半导体元件100具有位于单位电池区域和半导体元件的边缘之间的单位电池区域100ul和端子区域100f。 端子区域100f包括布置在第一碳化硅半导体层102中以与漂移区域102d接触的第二导电类型的环形区域103f。 环区域包括与第一碳化硅半导体层的表面接触的高浓度环区域103af以及含有比在高浓度环区域低的浓度的第二导电型杂质的低浓度环区域103bf，以及 其底部与第一碳化硅半导体层接触。 高浓度环区域103af的侧表面与漂移区域102d接触。 沿着与半导体衬底的主表面正交的方向观察，高浓度环区域和低浓度环区域的轮廓相同。

    SEMICONDUCTOR CHIP, SEMICONDUCTOR WAFER AND SEMICONDUCTOR CHIP MANUFACTURING METHOD
    5.
    发明申请
    SEMICONDUCTOR CHIP, SEMICONDUCTOR WAFER AND SEMICONDUCTOR CHIP MANUFACTURING METHOD 有权
    半导体芯片，半导体晶片和半导体芯片制造方法

    公开(公告)号：US20120319249A1

    公开(公告)日：2012-12-20

    申请号：US13579432

    申请日：2011-05-13

    申请人： Masao Uchida ,  Masashi Hayashi

    发明人： Masao Uchida ,  Masashi Hayashi

    IPC分类号： H01L29/04 ,  H01L21/78

    CPC分类号： H01L29/7827 ,  H01L27/0207 ,  H01L29/045 ,  H01L29/66068 ,  H01L29/808 ,  H01L29/812 ,  H01L29/861

    摘要： The semiconductor chip (18) of the present invention is a semiconductor chip (18) on which a power semiconductor device (10) is formed, and which includes a semiconductor substrate made from a hexagonal semiconductor, in which the semiconductor substrate has a shape of a rectangle on a principal surface, in which the rectangle is defined by two sides having lengths a and b equal to each other, and in which linear expansion coefficients in directions parallel to the two sides of the semiconductor substrate are equal to each other.

    摘要翻译： 本发明的半导体芯片（18）是形成功率半导体器件（10）的半导体芯片（18），其包括由六边形半导体制成的半导体衬底，其中半导体衬底具有 在主表面上的矩形，其中矩形由具有彼此相等的长度a和b的两边限定，并且其中平行于半导体衬底的两侧的方向上的线性膨胀系数彼此相等。

    SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREFOR
    6.
    发明申请
    SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREFOR 有权
    半导体元件及其制造方法

    公开(公告)号：US20100295062A1

    公开(公告)日：2010-11-25

    申请号：US12676212

    申请日：2009-07-03

    申请人： Masao Uchida ,  Masashi Hayashi ,  Koichi Hashimoto

    发明人： Masao Uchida ,  Masashi Hayashi ,  Koichi Hashimoto

    IPC分类号： H01L29/78 ,  H01L29/24 ,  H01L21/04

    CPC分类号： H01L29/7802 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7828

    摘要： A semiconductor device includes: a semiconductor layer including silicon carbide, which has been formed on a substrate; a semiconductor region 15 of a first conductivity type defined on the surface of the semiconductor layer 10; a semiconductor region 14 of a second conductivity type, which is defined on the surface 10s of the semiconductor layer so as to surround the semiconductor region 15 of the first conductivity type; and a conductor 19 with a conductive surface 19s that contacts with the semiconductor regions 15 and 14 of the first and second conductivity types. On the surface 10s of the semiconductor layer, the semiconductor region 15 of the first conductivity type has at least one first strip portion 60 that runs along a first axis i. The width C1 of the semiconductor region 15 of the first conductivity type as measured along the first axis i is greater than the width A1 of the conductive surface 19s as measured along the first axis i. And the periphery of the conductive surface 19s crosses the at least one first strip portion 60, 61.

    摘要翻译： 半导体器件包括：已经形成在衬底上的包含碳化硅的半导体层; 限定在半导体层10的表面上的第一导电类型的半导体区域15; 限定在半导体层的表面10s上以包围第一导电类型的半导体区域15的第二导电类型的半导体区域14; 以及具有与第一和第二导电类型的半导体区域15和14接触的导电表面19s的导体19。 在半导体层的表面10s上，第一导电类型的半导体区域15具有沿着第一轴线i延伸的至少一个第一条带部分60。 沿着第一轴线i测量的第一导电类型的半导体区域15的宽度C1大于沿着第一轴线i测量的导电表面19s的宽度A1。 并且导电表面19s的周边与至少一个第一条带部分60,61交叉。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20100193800A1

    公开(公告)日：2010-08-05

    申请号：US12665556

    申请日：2009-05-11

    申请人： Masao Uchida ,  Kazuya Utsunomiya ,  Koichi Hashimoto

    发明人： Masao Uchida ,  Kazuya Utsunomiya ,  Koichi Hashimoto

    IPC分类号： H01L29/24 ,  H01L23/52 ,  H01L29/772

    CPC分类号： H01L29/812 ,  H01L23/544 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7828 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device is fabricated on an off-cut semiconductor substrate 11. Each unit cell 10 thereof includes: a first semiconductor layer 12 on the surface of the substrate 11; a second semiconductor layer 16 stacked on the first semiconductor layer 12 to have an opening 16e that exposes first and second conductive regions 15 and 14 at least partially; a first conductor 19 located inside the opening 16e of the second semiconductor layer 16 and having a conductive surface 19s that contacts with the first and second conductive regions 15 and 14; and a second conductor 17 arranged on the second semiconductor layer 16 and having an opening 18e corresponding to the opening 16s of the second semiconductor layer 16. In a plane that is defined parallel to the surface of the substrate 11, the absolute value of a difference between the respective lengths of the second semiconductor layer 16 and the second conductor 18 as measured in the off-cut direction is greater than the absolute value of their difference as measured perpendicularly to the off-cut direction.

    摘要翻译： 半导体器件制造在截止半导体衬底11上。每个单电池10包括：在衬底11的表面上的第一半导体层12; 堆叠在第一半导体层12上以具有至少部分地暴露第一和第二导电区域15和14的开口16e的第二半导体层16; 第一导体19位于第二半导体层16的开口16e的内部，并且具有与第一和第二导电区域15和14接触的导电表面19s; 以及布置在第二半导体层16上并具有对应于第二半导体层16的开口16s的开口18e的第二导体17.在与衬底11的表面平行定义的平面中，差异的绝对值 在沿切断方向测量的第二半导体层16和第二导体18的各自长度之间的距离大于垂直于偏离方向测量的它们的差的绝对值。