公开(公告)号：US5859558A

公开(公告)日：1999-01-12

申请号：US827855

申请日：1997-04-11

申请人： Ricky Y. Chen ,  Lloyd F. Linder ,  Don C. Devendorf

发明人： Ricky Y. Chen ,  Lloyd F. Linder ,  Don C. Devendorf

IPC分类号： H03D7/14 ,  H03F3/343 ,  H03F3/45 ,  G06G7/12

CPC分类号： H03F3/45071 ,  H03D7/1408 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1491 ,  H03F3/343 ,  H03D2200/0033 ,  H03D2200/0043

摘要： A low voltage analog front end (AFE) includes a differential transistor pair which converts an input voltage, typically A.C.-coupled to the pair's control inputs, to a differential current. Impedance networks connected to each transistor's control input are joined together at a common node, and a current source is connected to the node which causes DC bias currents to be mirrored through the pair's current circuits, so that the AFE's differential output current comprises a differential current produced by the pair in response to an input voltage and superimposed on the DC bias currents. The current source preferably generates mirrored currents which are larger than its reference current to linearize the pair's response and to provide the AFE with a wide dynamic range. An input to the AFE sees a low impedance which is about equal to the sum of the impedance networks, which can be resistive or complex as needed. The AFE has widespread application as a front end circuit, serving as a low voltage input stage for a Gilbert mixer, for example. By generating bias currents via the pair's control inputs, supply voltage headroom requirements are reduced, improving a system's dynamic range and/or enabling the use of lower voltage power supplies. The AFE can be configured as either a differential or single-ended voltage-to-differential current converter.

摘要翻译： 低电压模拟前端（AFE）包括差分晶体管对，其将输入电压（通常与耦合到对的控制输入的交流耦合）转换为差分电流。 连接到每个晶体管的控制输入的阻抗网络在公共节点处连接在一起，并且电流源连接到节点，其导致DC偏置电流通过该对电流电路被镜像，使得AFE的差分输出电流包括差分电流 由输出电压响应输入电压产生并叠加在直流偏置电流上。 电流源优选地产生大于其参考电流的镜像电流，以使对的响应线性化并为AFE提供宽的动态范围。 AFE的输入端看到一个低阻抗，大约等于阻抗网络的总和，根据需要可以阻抗或复杂。 AFE作为前端电路广泛应用，例如用作Gilbert混频器的低电压输入级。 通过经由该对的控制输入产生偏置电流，降低了电源电压余量要求，提高系统的动态范围和/或使能低电压电源。 AFE可以配置为差分或单端电压 - 差分电流转换器。

公开(公告)号：US5847598A

公开(公告)日：1998-12-08

申请号：US854447

申请日：1997-05-14

申请人： Kazuya Sone

发明人： Kazuya Sone

IPC分类号： H03F3/45 ,  H03K5/22 ,  G06G7/12

CPC分类号： H03F3/4508 ,  H03F3/45094 ,  H03F3/45179 ,  H03F3/45192 ,  H03F3/45291 ,  H03F2203/45028

摘要： This invention is directed to providing a differential amplifier that can increase voltage gain at low frequency and that can be applied in signal processing circuits of high accuracy. Such a differential amplifier is provided in its output section with field effect transistor M5 having its source terminal connected to power terminal 4, its gate terminal connected to bias power terminal 7, and its drain terminal connected to the drain terminal of field effect transistor M3; and field effect transistor M6 having its source terminal connected to power terminal 4, its gate terminal connected to the drain terminals of field effect transistors M3 and M5, and its drain terminal connected to output terminal 3 and the drain terminal of field effect transistor M4.

摘要翻译： 本发明的目的在于提供一种差分放大器，其可以增加低频下的电压增益，并可以高精度地应用在信号处理电路中。 这种差分放大器在其输出部分提供其场效应晶体管M5，其源极端子连接到电源端子4，其栅极端子连接到偏置功率端子7，其漏极端子连接到场效应晶体管M3的漏极端子; 场效应晶体管M6的源极端子连接到电源端子4，其栅极端子连接到场效应晶体管M3和M5的漏极端子，其漏极端子连接到输出端子3和场效应晶体管M4的漏极端子。

公开(公告)号：US5825239A

公开(公告)日：1998-10-20

申请号：US852247

申请日：1997-05-06

申请人： Zubir Adal

发明人： Zubir Adal

IPC分类号： G11B20/10 ,  H03G3/30 ,  G06G7/12 ,  H03L5/00

CPC分类号： G11B20/10203 ,  H03G3/30

摘要： The present invention includes a variable gain amplifier to output two differential signals which are level shifted and compared through two comparators to drive a charge pump which produces either a discharge current or a charge current to provide feedback control to the variable gain amplifier.

摘要翻译： 本发明包括一个可变增益放大器，用于输出两个差分信号，它们通过两个比较器进行电平移位和比较，以驱动产生放电电流或充电电流的电荷泵，以向可变增益放大器提供反馈控制。

公开(公告)号：US5801570A

公开(公告)日：1998-09-01

申请号：US859089

申请日：1997-05-20

申请人： Masayuki Mizuno ,  Masakazu Yamashina

发明人： Masayuki Mizuno ,  Masakazu Yamashina

IPC分类号： H01L27/04 ,  G05F3/24 ,  G11C11/407 ,  H01L21/822 ,  H03K17/30 ,  H03K19/00 ,  H03K19/003 ,  H03L7/07 ,  H03L7/081 ,  H03L7/089 ,  G06G7/12

CPC分类号： H03L7/0805 ,  H03K19/0013 ,  H03K19/00384 ,  H03L7/07 ,  H03L7/0812 ,  G05F3/247 ,  H03L7/0891

摘要： A plurality of MOS transistors connected to each other at a substrate electrode thereof to have a substrate potential are deviation-compensated by a combination of a power source having a power source potential independent from the substrate potential, a power supply line connected to a source electrode of each of the MOS transistors, a sample circuit composed of a sampled one of the MOS transistors, detection circuitry for detecting an action of the sample circuit to provide a detection signal representing a difference between the detected action of the sample circuit and a reference action therefor, and a voltage generator connected between the power source and the power supply line, the voltage generator generating a voltage depending on the detection signal.

摘要翻译： 在其基板电极处彼此连接以具有衬底电位的多个MOS晶体管通过具有独立于衬底电位的电源电位的电源的组合进行偏差补偿，连接到源电极的电源线 的每个MOS晶体管的采样电路，由采样的一个MOS晶体管构成的采样电路，检测电路，用于检测采样电路的动作，以提供表示检测到的采样电路的动作与参考动作之间的差异的检测信号 以及连接在电源和电源线之间的电压发生器，电压发生器根据检测信号产生电压。

公开(公告)号：US5760632A

公开(公告)日：1998-06-02

申请号：US641237

申请日：1996-04-30

申请人： Masayuki Kawakami ,  Yoshiyasu Tsuruoka

发明人： Masayuki Kawakami ,  Yoshiyasu Tsuruoka

IPC分类号： H03D7/12 ,  H03D7/14 ,  G06G7/12

CPC分类号： H03D7/1441 ,  H03D7/1433 ,  H03D7/1458 ,  H03D2200/0047 ,  H03D2200/0084 ,  H03D2200/009 ,  H03D7/125

摘要： The present invention relates to a double-balanced mixer circuit. The double-balanced mixer circuit consists of a first differential circuit formed of a first transistor and a second transistor connected differentially to each other for receiving a first input signal; and a second differential circuit formed of a third transistor and a fourth transistor connected differentially to each other for receiving a second input signal; either the junction of the drain or collector of the first transistor and the drain or collector of the third transistor or the junction of the drain or collector of the second transistor and the drain or collector of the fourth transistor producing an output signal having frequency information on the sum of the first input signal and the second input signal or the difference between them. The double-balanced mixer circuit is used suitably as a frequency converter which is used at the high-frequency section in a mobile communications equipment such as portable telephones. The object is to handle sufficiently with a reduced voltage of the power source and to facilitate the input operation.

摘要翻译： 双平衡混频器电路技术领域本发明涉及一种双平衡混频器电路。 双平衡混频器电路包括由第一晶体管和第二晶体管形成的第一差分电路，第一晶体管和第二晶体管彼此差分地连接以接收第一输入信号; 以及由第三晶体管和第四晶体管形成的第二差分电路，所述第三晶体管和第四晶体管彼此差分地连接以接收第二输入信号; 第一晶体管的漏极或集电极与第三晶体管的漏极或集电极或第二晶体管的漏极或集电极的结点与第四晶体管的漏极或集电极之间的结，产生具有频率信息的输出信号 第一输入信号和第二输入信号之和或它们之间的差。 双平衡混频器电路被适当地用作在诸如便携式电话的移动通信设备中在高频部分使用的频率转换器。 目的是充分地处理电源的降低的电压并且便于输入操作。

公开(公告)号：US5757227A

公开(公告)日：1998-05-26

申请号：US689447

申请日：1996-08-12

申请人： James H. McQuaid ,  Anthony D. Lavietes

发明人： James H. McQuaid ,  Anthony D. Lavietes

IPC分类号： H03F3/08 ,  G06G7/12

CPC分类号： H03F3/082 ,  H03F2200/372

摘要： A low noise, low power consumption, compact, ambient temperature signal amplifier for a Cadmium Zinc Telluride (CZT) radiation detector. The amplifier can be used within a larger system (e.g., including a multi-channel analyzer) to allow isotopic analysis of radionuclides in the field. In one embodiment, the circuit stages of the low power, low noise amplifier are constructed using integrated circuit (IC) amplifiers , rather than discrete components, and include a very low noise, high gain, high bandwidth dual part preamplification stage, an amplification stage, and an filter stage. The low noise, low power consumption, compact, ambient temperature amplifier enables the CZT detector to achieve both the efficiency required to determine the presence of radio nuclides and the resolution necessary to perform isotopic analysis to perform nuclear material identification. The present low noise, low power, compact, ambient temperature amplifier enables a CZT detector to achieve resolution of less than 3% full width at half maximum at 122 keV for a Cobalt-57 isotope source. By using IC circuits and using only a single 12 volt supply and ground, the novel amplifier provides significant power savings and is well suited for prolonged portable in-field use and does not require heavy, bulky power supply components.

摘要翻译： 用于碲化锌碲化镉（CZT）辐射探测器的低噪声，低功耗，紧凑的环境温度信号放大器。 放大器可以在更大的系统（例如，包括多通道分析仪）中使用，以允许现场对放射性核素进行同位素分析。 在一个实施例中，低功率低噪声放大器的电路级使用集成电路（IC）放大器而不是分立元件构成，并且包括非常低的噪声，高增益，高带宽双分量前置放大级，放大级 ，和过滤器阶段。 低噪声，低功耗，紧凑的环境温度放大器使CZT检测器能够实现确定放射性核素的存在所需的效率以及执行同位素分析进行​​核材料识别所需的分辨率。 目前的低噪声，低功耗，紧凑的环境温度放大器使得CZT检测器能够在钴-57同位素源的122 keV下实现小于3％全宽的半高分辨率。 通过使用IC电路并仅使用单个12伏电源和地线，新型放大器可显着节省功耗，非常适合长时间的便携式现场使用，并且不需要庞大的电源组件。

公开(公告)号：US5748027A

公开(公告)日：1998-05-05

申请号：US794836

申请日：1997-02-03

申请人： Robert S. Cargill

发明人： Robert S. Cargill

IPC分类号： H03G3/02 ,  H03G3/10 ,  H03G7/00 ,  H03G11/08 ,  G06G7/12

CPC分类号： H03G7/00

摘要： Low power, high linearity log-linear control method and apparatus wherein a master log-linear cell generates a control voltage that is buffered and applied to a slave log-linear cell. By breaking this function up into two pieces, the control loop characteristics are isolated from the signal path. Low impedance buffers can be used to drive the slave log-linear cell control ports, independent of the control loop, providing improved gain control range and linearity. This log-linear control is of particular value in applications that require low harmonic distortion and high gain control range in power or pin-constrained applications. Details of the method are disclosed.

摘要翻译： 低功率，高线性对数线性控制方法和装置，其中主对数线性单元产生缓冲并施加到从对数线性单元的控制电压。 通过将该功能分成两部分，控制回路特性与信号路径隔离。 低阻抗缓冲器可用于驱动从对数线性单元控制端口，独立于控制回路，提供改进的增益控制范围和线性度。 该对数线性控制在需要低谐波失真和功率或引脚限制应用中的高增益控制范围的应用中具有特殊的价值。 公开了该方法的细节。

公开(公告)号：US5742195A

公开(公告)日：1998-04-21

申请号：US597582

申请日：1996-02-02

申请人： Masayuki Mizuno ,  Masakazu Yamashina

发明人： Masayuki Mizuno ,  Masakazu Yamashina

IPC分类号： H01L27/04 ,  G05F3/24 ,  G11C11/407 ,  H01L21/822 ,  H03K17/30 ,  H03K19/00 ,  H03K19/003 ,  H03L7/07 ,  H03L7/081 ,  H03L7/089 ,  G06G7/12

CPC分类号： H03L7/0805 ,  H03K19/0013 ,  H03K19/00384 ,  H03L7/07 ,  H03L7/0812 ,  G05F3/247 ,  H03L7/0891

摘要： A plurality of MOS transistors connected to each other at a substrate electrode thereof to have a substrate potential are deviation-compensated by a combination of a power source having a power source potential independent from the substrate potential, a power supply line connected to a source electrode of each of the MOS transistors, a sample circuit composed of a sampled one of the MOS transistors, detection circuitry for detecting an action of the sample circuit to provide a detection signal representing a difference between the detected action of the sample circuit and a reference action therefor, and a voltage generator connected between the power source and the power supply line, the voltage generator generating a voltage depending on the detection signal.

摘要翻译： 在其基板电极处彼此连接以具有衬底电位的多个MOS晶体管通过具有独立于衬底电位的电源电位的电源的组合进行偏差补偿，连接到源电极的电源线 的每个MOS晶体管的采样电路，由采样的一个MOS晶体管构成的采样电路，检测电路，用于检测采样电路的动作，以提供表示检测到的采样电路的动作与参考动作之间的差异的检测信号 以及连接在电源和电源线之间的电压发生器，电压发生器根据检测信号产生电压。

公开(公告)号：US5724483A

公开(公告)日：1998-03-03

申请号：US470184

申请日：1995-06-07

申请人： Rizzotto Gianguido ,  Poluzzi Rinaldo ,  Andrea Pagni

发明人： Rizzotto Gianguido ,  Poluzzi Rinaldo ,  Andrea Pagni

IPC分类号： G05B13/02 ,  G06F9/44 ,  G06G7/12 ,  G06N7/02 ,  G06N7/04 ,  G06F15/18

CPC分类号： G05B13/0275 ,  G06N7/04 ,  Y10S706/90

摘要： A fuzzy logic electronic controller whereby predetermined membership functions .mu.(x) of logic (X) variables are subjected to so-called inference operations configured essentially as IF-THE rules with at least one front preposition and at least one rear implication. The controller is of a kind which includes an input or fuzzyfier section having a plurality of inputs for analog or digital signals, a central control unit or fuzzy controller core placed after said input section and being provided with memories, and an output section or defuzzyfier connected to the output of the central unit to convert the results of the inference operations back to analog or digital signals. The controller includes a plurality of fuzzyfiers being disposed in parallel within the input section and each connected to a pair of analog and digital inputs, a plurality of storage modules corresponding in number to said fuzzyfiers and containing data of the front prepositions only of said rules, a fuzzy controller inference unit active in the central control unit to carry out logic operations based on the inference rules of the fuzzy logic by extracting data from said memories through an interfacing circuit, and an additional memory coupled between the fuzzy controller inference unit and the defuzzyfier and adapted to contain data pertaining to the rear (THEN) implications only of said inference rules.

摘要翻译： 模糊逻辑电子控制器，其中逻辑（X）变量的预定隶属函数mu（x）经受所谓的推理操作，所述推理操作基本上被配置为具有至少一个前介词和至少一个后置含义的IF-The规则。 控制器是一种包括具有用于模拟或数字信号的多个输入的输入或模糊部分，放置在所述输入部分之后并设置有存储器的中央控制单元或模糊控制器核心，以及连接到输出部分或模糊控制器 到中央单元的输出以将推理操作的结果转换回模拟或数字信号。 控制器包括在输入部分内并联设置的多个模糊器，每个模糊器连接到一对模拟和数字输入端，多个存储模块数量对应于所述模糊器并且仅包含所述规则的前置介面的数据， 一个模糊控制器推理单元，主动在中央控制单元中，通过一个接口电路从所述存储器提取数据，并通过耦合在模糊控制器推理单元和defuzzyfier之间的附加存储器，基于模糊逻辑的推理规则执行逻辑运算 并且适于仅包含与所述推理规则有关的后（THEN）影响的数据。

公开(公告)号：US5646576A

公开(公告)日：1997-07-08

申请号：US506158

申请日：1995-07-24

申请人： Daniel Charles Feldt ,  William David Anderson

发明人： Daniel Charles Feldt ,  William David Anderson

IPC分类号： G06G7/12 ,  H03F1/02 ,  H03F3/20 ,  H03F3/30

CPC分类号： H03F1/0277

摘要： An output stage (418) for an operational amplifier (403) powered by a first supply voltage rail (102) and a second supply voltage rail (104) includes a buffer (100) and a current booster (500) for amplifying an input voltage (105) into a low impedance output signal (117 and 520). The buffer (100) amplifies the input voltage (105) into the amplified output signal (117 and 520) when the input voltage (105) is within a buffer voltage range (210), the buffer voltage range (210) contained within a maximum voltage range (208) defined by a voltage difference in the first supply voltage rail (102) and the second supply voltage rail (104). The current booster (500) assists the buffer (100) in amplifying the input voltage (105) into the output signal (117 and 520) when the input voltage (105) is outside of the buffer voltage range (210) but within the maximum voltage range (208).

摘要翻译： 用于由第一电源电压轨（102）和第二电源电压轨（104）供电的运算放大器（403）的输出级（418）包括缓冲器（100）和用于放大输入电压 （105）转换成低阻抗输出信号（117和520）。 当输入电压（105）在缓冲电压范围（210）内时，缓冲器（100）将输入电压（105）放大到放大的输出信号（117和520）中，缓冲器电压范围（210）包含在最大值 电压范围（208）由第一电源电压轨（102）和第二电源电压轨（104）中的电压差限定。 当输入电压（105）在缓冲器电压范围（210）之外但在最大值内时，电流升压器（500）帮助缓冲器（100）将输入电压（105）放大到输出信号（117和520） 电压范围（208）。