METHOD FOR PRODUCING HERMETIC PACKAGE, AND HERMETIC PACKAGE

    公开(公告)号:US20190296194A1

    公开(公告)日:2019-09-26

    申请号:US16305964

    申请日:2017-04-28

    摘要: A method of producing a hermetic package of the present invention includes the steps of: preparing a ceramic base; preparing a glass cover; forming, on the glass cover, a sealing material layer having a total light transmittance in a thickness direction at a wavelength of laser light to be radiated of 10% or more and 80% or less; arranging the glass cover and the ceramic base so that the glass cover and the ceramic base are laminated on each other through intermediation of the sealing material layer; and irradiating the sealing material layer with the laser light from a glass cover side to soften and deform the sealing material layer, to thereby hermetically integrate the ceramic base and the glass cover with each other to obtain a hermetic package.

    Semiconductor module
    92.
    发明授权

    公开(公告)号:US10403593B2

    公开(公告)日:2019-09-03

    申请号:US15837560

    申请日:2017-12-11

    摘要: A semiconductor module that restrains the occurrence of detachment and an operation failure. The semiconductor module includes a PCB base, a conductive die pad provided on the PCB base, a semiconductor die provided on the conductive die pad, and a conductive die bonding agent that electrically connects the conductive die pad and the semiconductor die. The semiconductor module further includes a wire bonding pad provided on the PCB base, a wire that electrically connects the wire bonding pad and the semiconductor die, and a sealing resin that seals the conductive die pad, the semiconductor die, the conductive die bonding agent, the wire bonding pad, and the wire. In a planar view, the area of the conductive die pad is 5.0 mm2 or less.

    SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE

    公开(公告)号:US20190267252A1

    公开(公告)日:2019-08-29

    申请号:US16406899

    申请日:2019-05-08

    摘要: In accordance with an embodiment, a semiconductor component includes a support having a side in which a device receiving structure and an interconnect structure are formed and a side from which a plurality of leads extends. A semiconductor device having a control terminal and first and second current carrying terminals and configured from a III-N semiconductor material is mounted to the device receiving structure. A first electrical interconnect is coupled between the first current carrying terminal of the semiconductor device and a first lead. A second electrical interconnect is coupled between the control terminal of the semiconductor device and a second lead.