公开(公告)号：US20180053664A1

公开(公告)日：2018-02-22

申请号：US15647882

申请日：2017-07-12

申请人： BOE Technology Group Co., Ltd.

发明人： Lili Wang ,  Lu Wang

IPC分类号： H01L21/447 ,  H01L21/762 ,  H01L23/482 ,  H01L21/683 ,  H01L21/203 ,  B23K20/12

CPC分类号： H01L21/447 ,  B23K20/121 ,  H01L21/203 ,  H01L21/6838 ,  H01L21/76251 ,  H01L23/4828 ,  H01L2021/60187 ,  H01L2224/75

摘要： The embodiments of the present disclosure provide a bonding device for a chip on film and a display panel and a bonding method for the same. The bonding device includes: a bearing stage having a horizontal bearing surface for supporting at least one row of display panels, wherein one row of the at least one row of display panels has a row of first bonding regions; a grasping unit disposed above the bearing stage and configured to grasp at least a partial area of the entire chip on film so that a row of second bonding regions of the entire chip on film is horizontally located above the one row of display panels; and a bonding unit configured to bond the row of second bonding regions which has been aligned with the row of first bonding regions to the row of first bonding regions.

公开(公告)号：US20140357018A1

公开(公告)日：2014-12-04

申请号：US14459548

申请日：2014-08-14

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Kengo AKIMOTO ,  Masashi TSUBUKU

IPC分类号： H01L29/66 ,  H01L27/12

CPC分类号： H01L29/66742 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/447 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/7869

摘要： To provide a method for manufacturing a thin film transistor in which contact resistance between an oxide semiconductor layer and source and drain electrode layers is small, the surfaces of the source and drain electrode layers are subjected to sputtering treatment with plasma and an oxide semiconductor layer containing In, Ga, and Zn is formed successively over the source and drain electrode layers without exposure of the source and drain electrode layers to air.

摘要翻译： 为了提供一种制造薄膜晶体管的方法，其中氧化物半导体层和源极和漏极电极层之间的接触电阻很小，源极和漏极电极层的表面用等离子体和含有氧化物半导体层的氧化物半导体层进行溅射处理 In，Ga和Zn依次形成在源极和漏极电极层上，而不会将源极和漏极电极层暴露于空气。

公开(公告)号：US20180076022A1

公开(公告)日：2018-03-15

申请号：US15584637

申请日：2017-05-02

申请人： SK hynix Inc.

发明人： Yong Soo CHOI ,  Ho Jin JEONG

IPC分类号： H01L21/02 ,  H01L21/447

CPC分类号： H01L21/02164 ,  B81C1/00952 ,  H01L21/02019 ,  H01L21/02052 ,  H01L21/0206 ,  H01L21/02063 ,  H01L21/02112 ,  H01L21/02172 ,  H01L21/0223 ,  H01L21/02255 ,  H01L21/02403 ,  H01L21/30625 ,  H01L21/3065 ,  H01L21/447

摘要： In a method of treating a semiconductor substrate, a plurality of active regions and a plurality of trench isolation regions are formed by selectively etching the semiconductor substrate. The semiconductor substrate is washed by providing deionized water to the semiconductor substrate. A silicon-based solution is provided to the semiconductor substrate by replacing the deionized water disposed on the semiconductor substrate with the silicon-based solution. A silicon oxide material is formed from the silicon-based solution by performing a heat treatment on the silicon-based solution and the semiconductor substrate. The silicon oxide material fills the trench isolation regions.

公开(公告)号：US09204560B2

公开(公告)日：2015-12-01

申请号：US14547147

申请日：2014-11-19

申请人： Shih-Hao Sun

发明人： Shih-Hao Sun

IPC分类号： H05K3/12 ,  H05K3/42 ,  H01L23/498 ,  H01L21/48 ,  H01L21/447 ,  H01L33/64

CPC分类号： H05K3/42 ,  H01L21/447 ,  H01L21/486 ,  H01L23/49827 ,  H01L33/642 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00014 ,  H01L2924/15311 ,  Y10T29/49165 ,  H01L2224/0401

摘要： A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.

摘要翻译： 提供了一种封装载体的制造方法。 提供了具有上表面，下表面，位于下表面的多个空腔和穿过绝缘基板并分别与空腔连通的多个通孔的绝缘基板。 多个通孔由腔和通孔限定。 填充通孔的导电材料形成为限定多个导电柱。 在上表面上形成有从上表面延伸到导电柱的顶表面和多个盲孔的绝缘层。 填充盲孔的图案化电路层形成在顶表面上，连接到导电柱并暴露顶表面的一部分。 在图案化电路层上形成焊料掩模层，并且具有暴露图案化电路层的一部分以限定多个焊盘的多个开口。

公开(公告)号：US20140295594A1

公开(公告)日：2014-10-02

申请号：US14305387

申请日：2014-06-16

申请人： Micron Technology, Inc.

发明人： Scott D. Schellhammer ,  Vladimir Odnoblyudov ,  Jeremy S. Frei

IPC分类号： H01L33/48

CPC分类号： H01L25/0753 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/447 ,  H01L23/49513 ,  H01L24/04 ,  H01L24/06 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L33/0066 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/83001 ,  H01L2224/83005 ,  H01L2224/83121 ,  H01L2224/8314 ,  H01L2224/83193 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/00

摘要： Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.

摘要翻译： 本文公开了用于半导体器件的不连续键。 根据特定实施例的装置包括第一基板和第二基板，第一基板和第二基板中的至少一个具有多个固态换能器。 第二基板可以包括多个突起和多个中间区域，并且可以以不连续的键连接到第一基板。 单独的固态换能器可以至少部分地设置在相应的中间区域内，并且不连续键可以包括将各个固态换能器接合到相应的中间区域的盲端的粘合材料。 本文公开了用于半导体器件的不连续键的相关方法和系统。

公开(公告)号：US08754424B2

公开(公告)日：2014-06-17

申请号：US13220462

申请日：2011-08-29

申请人： Scott D. Schellhammer ,  Vladimir Odnoblyudov ,  Jeremy S. Frei

发明人： Scott D. Schellhammer ,  Vladimir Odnoblyudov ,  Jeremy S. Frei

IPC分类号： H01L33/00 ,  H01L21/18 ,  H01L21/20 ,  H01L21/447 ,  H01L23/495 ,  H01L23/00

CPC分类号： H01L25/0753 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/447 ,  H01L23/49513 ,  H01L24/04 ,  H01L24/06 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L33/0066 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/83001 ,  H01L2224/83005 ,  H01L2224/83121 ,  H01L2224/8314 ,  H01L2224/83193 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/00

摘要： Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.

摘要翻译： 本文公开了用于半导体器件的不连续键。 根据特定实施例的装置包括第一基板和第二基板，第一基板和第二基板中的至少一个具有多个固态换能器。 第二基板可以包括多个突起和多个中间区域，并且可以以不连续的键连接到第一基板。 单独的固态换能器可以至少部分地设置在相应的中间区域内，并且不连续键可以包括将各个固态换能器接合到相应的中间区域的盲端的粘合材料。 本文公开了用于半导体器件的不连续键的相关方法和系统。

公开(公告)号：US20190172724A1

公开(公告)日：2019-06-06

申请号：US15828819

申请日：2017-12-01

申请人： Micron Technology, Inc.

发明人： Eiichi Nakano

IPC分类号： H01L21/447 ,  H01L21/687

CPC分类号： H01L21/447 ,  H01L21/68778 ,  H01L21/68785 ,  H01L22/20 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/06596 ,  H01L2225/1094 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2224/81 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/83

摘要： Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

公开(公告)号：US20170321130A1

公开(公告)日：2017-11-09

申请号：US15612457

申请日：2017-06-02

申请人： MagneGas Corporation

发明人： Ruggero Maria Santilli

IPC分类号： C10G32/02 ,  C10L9/04 ,  C10L1/06 ,  C10L1/08 ,  H01L21/447 ,  B01J19/08

CPC分类号： C10G32/02 ,  B01J19/088 ,  B01J19/12 ,  B01J2219/0805 ,  B01J2219/085 ,  B01J2219/0884 ,  B01J2219/0886 ,  C10G2300/405 ,  C10G2400/02 ,  C10G2400/04 ,  C10L1/06 ,  C10L1/08 ,  C10L9/04 ,  C10L2200/0423 ,  C10L2200/0446 ,  C10L2270/023 ,  C10L2270/026 ,  C10L2290/38 ,  C10L2290/40 ,  H01L21/447

摘要： A method for bonding a fluid to a substance includes filling a first pressure vessel with the fluid and pressurizing the first pressure vessel to a first pressure. The fluid is the circulated through an electric arc formed within the first pressure vessel, thereby creating a treated fluid. Within a second pressure vessel, the substance is exposed to a magnetic field, thereby forming a polarized substance. The treated fluid and polarized substance are combined under a second pressure within a third pressure vessel, thereby exposing the treated fluid to the polarized substance at a pressure sufficient to achieve a bond.

公开(公告)号：US20170186623A1

公开(公告)日：2017-06-29

申请号：US15390077

申请日：2016-12-23

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

发明人： Nicolas POSSEME ,  Maxime Garcia-Barros ,  Yves Morand

IPC分类号： H01L21/324 ,  H01L21/322 ,  H01L29/78 ,  H01L21/02 ,  H01L21/447 ,  H01L21/762 ,  H01L21/223

CPC分类号： H01L21/324 ,  H01L21/02057 ,  H01L21/223 ,  H01L21/2236 ,  H01L21/31155 ,  H01L21/3221 ,  H01L21/447 ,  H01L21/762 ,  H01L21/823468 ,  H01L29/4908 ,  H01L29/665 ,  H01L29/66507 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/7827

摘要： There is provided a method for manufacturing a transistor from a stack including at least one gate pattern comprising at least one flank, the method including forming at least one gate spacer over at least the flank of the gate pattern; and reducing, after a step of exposure of the stack to a temperature greater than or equal to 600° C., of a dielectric permittivity of the at least one gate spacer, the reducing including at least one ion implantation in a portion at least of a thickness of the at least one gate spacer.

公开(公告)号：US20160336302A1

公开(公告)日：2016-11-17

申请号：US15159237

申请日：2016-05-19

申请人： Micron Technology, Inc.

发明人： Scott D. Schellhammer ,  Vladimir Odnoblyudov ,  Jeremy S. Frei

IPC分类号： H01L25/075 ,  H01L33/62 ,  H01L33/00 ,  H01L33/48

CPC分类号： H01L25/0753 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/447 ,  H01L23/49513 ,  H01L24/04 ,  H01L24/06 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L33/0066 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/486 ,  H01L33/62 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/83001 ,  H01L2224/83005 ,  H01L2224/83121 ,  H01L2224/8314 ,  H01L2224/83193 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/00

摘要： Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.