METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    4.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号:US20140357018A1

    公开(公告)日:2014-12-04

    申请号:US14459548

    申请日:2014-08-14

    IPC分类号: H01L29/66 H01L27/12

    摘要: To provide a method for manufacturing a thin film transistor in which contact resistance between an oxide semiconductor layer and source and drain electrode layers is small, the surfaces of the source and drain electrode layers are subjected to sputtering treatment with plasma and an oxide semiconductor layer containing In, Ga, and Zn is formed successively over the source and drain electrode layers without exposure of the source and drain electrode layers to air.

    摘要翻译: 为了提供一种制造薄膜晶体管的方法,其中氧化物半导体层和源极和漏极电极层之间的接触电阻很小,源极和漏极电极层的表面用等离子体和含有氧化物半导体层的氧化物半导体层进行溅射处理 In,Ga和Zn依次形成在源极和漏极电极层上,而不会将源极和漏极电极层暴露于空气。

    Manufacturing method of package carrier
    6.
    发明授权
    Manufacturing method of package carrier 有权
    包装载体的制造方法

    公开(公告)号:US09204560B2

    公开(公告)日:2015-12-01

    申请号:US14547147

    申请日:2014-11-19

    申请人: Shih-Hao Sun

    发明人: Shih-Hao Sun

    摘要: A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.

    摘要翻译: 提供了一种封装载体的制造方法。 提供了具有上表面,下表面,位于下表面的多个空腔和穿过绝缘基板并分别与空腔连通的多个通孔的绝缘基板。 多个通孔由腔和通孔限定。 填充通孔的导电材料形成为限定多个导电柱。 在上表面上形成有从上表面延伸到导电柱的顶表面和多个盲孔的绝缘层。 填充盲孔的图案化电路层形成在顶表面上,连接到导电柱并暴露顶表面的一部分。 在图案化电路层上形成焊料掩模层,并且具有暴露图案化电路层的一部分以限定多个焊盘的多个开口。

    SINTER BONDING SHEET
    9.
    发明公开

    公开(公告)号:US20240339335A1

    公开(公告)日:2024-10-10

    申请号:US18624360

    申请日:2024-04-02

    摘要: A sinter bonding sheet includes a sinter bonding layer that includes sinterable particles containing a conductive metal, and an organic binder, in which the sinter bonding layer has a first adhesive surface for being adhered to an adherend and a second adhesive surface for being adhered to another adherend, and when the value of the minimum load reached during an unloading step in a load-displacement measurement according to the nanoindentation method to the first adhesive surface is b1, and the value of the minimum load reached during the unloading step in the load-displacement measurement according to the nanoindentation method to the second adhesive surface is b2, b1 satisfies −100 μN≤b1≤−35 μN and b2 satisfies −100 μN≤b2≤−35 μN.