公开(公告)号：US07081765B2

公开(公告)日：2006-07-25

申请号：US10925031

申请日：2004-08-25

申请人： Mitsutoshi Miyasaka ,  Hiroyuki Hara

发明人： Mitsutoshi Miyasaka ,  Hiroyuki Hara

IPC分类号： G01R27/26

CPC分类号： G06K9/0002

摘要： Aspects of the invention provide a superior electrostatic capacitance detecting device. The electrostatic capacitance detection device can include M number of row lines, N number of column lines, and electrostatic capacitance detecting devices formed at intersections of these lines. The electrostatic capacitance detecting element can include a signal detection element, a signal amplifying element, a column selecting element, and a row selecting element, and the signal detection element can include a capacitance detecting electrode, a capacitance detecting dielectric layer, and a reference capacitor, and one electrode of the reference capacitor connects to a column line.

摘要翻译： 本发明提供一种优良的静电电容检测装置。 静电电容检测装置可以包括M行行线，N列列线和在这些线的交点处形成的静电电容检测装置。 静电电容检测元件可以包括信号检测元件，信号放大元件，列选择元件和行选择元件，并且信号检测元件可以包括电容检测电极，电容检测电介质层和参考电容器 ，参考电容器的一个电极连接到列线。

公开(公告)号：US07053633B2

公开(公告)日：2006-05-30

申请号：US10808523

申请日：2004-03-25

申请人： Hiroyuki Hara

发明人： Hiroyuki Hara

IPC分类号： G01R27/26 ,  G06K9/00

CPC分类号： G01D5/2405 ,  G01D5/24 ,  G06K9/0002

摘要： The object of the present invention is to provide a high-precision fingerprint sensor. In order to achieve this object, the fingerprint sensor of the present invention comprises a matrix portion in which capacitance detection circuits, which each output a detection signal corresponding to the capacitance formed between the capacitance detection circuit and a fingerprint, are arranged in the form of a matrix; and an amplification circuit for amplifying this detection signal. The amplification circuit functions as a signal source for outputting a detection signal to the capacitance detection circuit and is constituted such that the detection signal is transmitted from the amplification circuit to the low potential source line via the capacitance detection circuit.

摘要翻译： 本发明的目的是提供一种高精度指纹传感器。 为了实现该目的，本发明的指纹传感器包括矩阵部分，其中各个输出与电容检测电路和指纹之间形成的电容对应的检测信号的电容检测电路以 矩阵 以及用于放大该检测信号的放大电路。 放大电路用作将检测信号输出到电容检测电路的信号源，并且被构成为使得检测信号经由电容检测电路从放大电路发送到低电位源极线。

公开(公告)号：US07017071B2

公开(公告)日：2006-03-21

申请号：US09985225

申请日：2001-11-02

申请人： Kojiro Katayama ,  Makoto Kawashima ,  Junichi Hirose ,  Kazushi Omori ,  Hiroyuki Hara ,  Shinichi Nakamura

发明人： Kojiro Katayama ,  Makoto Kawashima ,  Junichi Hirose ,  Kazushi Omori ,  Hiroyuki Hara ,  Shinichi Nakamura

IPC分类号： G06F11/00

CPC分类号： H04L41/06 ,  H04L43/065 ,  H04L43/0817

摘要： A remote site managing system manages, in a unified fashion, computers and peripheral devices installed at a customer site. The remote site managing system automatically receives information indicating a failure which has occurred or indicating a high possibility that a failure will occur in some of PC/servers or peripheral devices installed in a customer's office and provides maintenance services without causing a customer to be concerned about anything. Furthermore, transmission of a request to a maintenance service company and reception of a service operation report from the service company are performed by the remote site managing system in an unified fashion.

公开(公告)号：US20050179446A1

公开(公告)日：2005-08-18

申请号：US11041265

申请日：2005-01-25

申请人： Hiroyuki Hara ,  Mitsutoshi Miyasaka

发明人： Hiroyuki Hara ,  Mitsutoshi Miyasaka

IPC分类号： G01B7/28 ,  G01D5/24 ,  G06K9/00 ,  G01R27/26

CPC分类号： G06K9/0002 ,  G01D5/2405

摘要： Aspects of the invention can provide a fingerprint sensor for searching for a detection condition in a short period of time in order to read information of ridges and valleys of a fingerprint as changes in capacitance. The fingerprint sensor of the invention can include a plurality of capacitance detection circuits that output a detection signal having ridge/valley information of a fingerprint based on capacitance formed between the sensor and a fingertip surface, a fingerprint detection part in which the plurality of capacitance detection circuits are arranged to intersect with one another in a row direction and a column direction, a plurality of scanning lines, a scanning line driver for driving the scanning line, a plurality of data lines, a data line driver for driving the data line, and search device for searching for a detection condition of ridge/valley information by changing detection conditions of the ridge/valley information in a state that the plurality of capacitance detection circuits arranged along any one of the plurality of scanning lines are being selected.

摘要翻译： 本发明的方面可以提供一种用于在短时间内搜索检测条件的指纹传感器，以便读取指纹的脊和谷的信息作为电容的变化。 本发明的指纹传感器可以包括多个电容检测电路，其输出具有基于在传感器和指尖表面之间形成的电容的指纹的脊/谷信息的检测信号，指纹检测部分中的多个电容检测 电路被布置为在行方向和列方向上彼此相交，多条扫描线，用于驱动扫描线的扫描线驱动器，多条数据线，用于驱动数据线的数据线驱动器，以及 搜索装置，用于通过在选择沿着多条扫描线中的任何一条布置的多个电容检测电路的状态下改变脊/谷信息的检测条件来搜索脊谷信息的检测条件。

公开(公告)号：US5930163A

公开(公告)日：1999-07-27

申请号：US993180

申请日：1997-12-18

申请人： Hiroyuki Hara ,  Masataka Matsui

发明人： Hiroyuki Hara ,  Masataka Matsui

IPC分类号： H01L29/78 ,  H01L21/8238 ,  H01L21/8244 ,  H01L27/092 ,  H01L27/11 ,  G11C11/00

CPC分类号： H01L27/1104 ,  Y10S257/903

摘要： This invention relates to P- and N-well regions where inverters constituting an SRAM cell are formed. The P-well region is divided into two parts, which are laid out on the two sides of the N-well region. Boundaries (BL11, BL12) are formed to run parallel to bit lines (BL, /BL). With this layout, diffusion layers (ND1, ND2) within the P-well regions can be formed into simple shapes free from any bent portion, reducing the cell area.

摘要翻译： 本发明涉及其中形成有构成SRAM单元的反相器的P-阱区域。 P井区分为两部分，分布在N井区两侧。 边界（BL11，BL12）形成为平行于位线（BL，/ BL）延伸。 通过这种布局，P阱区域内的扩散层（ND1，ND2）可以形成为没有任何弯曲部分的简单形状，从而减小了单元面积。

公开(公告)号：US5781175A

公开(公告)日：1998-07-14

申请号：US701455

申请日：1996-08-22

申请人： Hiroyuki Hara

发明人： Hiroyuki Hara

IPC分类号： G06F17/30 ,  G09G5/00

CPC分类号： G06F17/30274 ,  Y10S707/99933

摘要： An image search apparatus includes a memory for storing plural sets of images, each set of the plural sets of images comprising one page image or plural page images, a display unit for displaying an image, and a control unit for controlling the display of the plural sets of images stored in the memory in reduced size on the display unit at a time, the control unit being capable of displaying desired pages of the said plural sets of images in reduced size.

摘要翻译： 图像搜索装置包括存储多组图像的存储器，包括一个页面图像或多个页面图像的多组图像的每组，用于显示图像的显示单元，以及用于控制多个图像的显示的控制单元 一次在显示单元上以减小的尺寸存储在存储器中的图像组，该控制单元能够以缩小的尺寸显示所述多组图像的期望页面。

公开(公告)号：US5289405A

公开(公告)日：1994-02-22

申请号：US661020

申请日：1991-02-26

申请人： Hiroyuki Hara ,  Yoshinori Watanabe

发明人： Hiroyuki Hara ,  Yoshinori Watanabe

IPC分类号： H01L27/118 ,  G11C7/06 ,  G11C8/16 ,  G11C11/419 ,  H01L21/82 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  G11C7/00

CPC分类号： G11C8/16 ,  G11C11/419 ,  G11C7/067

摘要： A semiconductor memory circuit device having memory cells constructed on a BiCMOS gate array includes amplifying means constituted by a bipolar transistor connected to the output stage of each of memory cells arranged in a matrix form on a semiconductor substrate and formed in a gate array memory cell configuration by use of the Master slice approach. The amplifying means amplifies the potential level of readout data of the memory cell and output the same to an output line, thus enhancing the driving ability of the output line and reducing the whole readout time for reading out data from the memory circuit.

摘要翻译： 具有构造在BiCMOS门阵列上的存储单元的半导体存储器电路器件包括由半导体衬底上以矩阵形式布置的每个存储单元的输出级连接的双极型晶体管构成的放大装置，形成为栅阵列存储单元配置 通过使用主切片方法。 放大装置放大存储单元的读出数据的电位并将其输出到输出线，从而提高输出线的驱动能力，并减少用于从存储器电路读出数据的整个读出时间。

公开(公告)号：US5272366A

公开(公告)日：1993-12-21

申请号：US747864

申请日：1991-08-20

申请人： Toshikazu Sei ,  Yasunori Tanaka ,  Hiroyuki Hara

发明人： Toshikazu Sei ,  Yasunori Tanaka ,  Hiroyuki Hara

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/118 ,  H01L29/732 ,  H01L27/10 ,  H01L29/76

CPC分类号： H01L27/11896

摘要： A bipolar transistor/insulated gate transistor hybrid semiconductor device comprises a well region formed on a semiconductor substrate to serve as a first active region of a bipolar transistor, an insulated gate transistor having source and drain regions formed in the well region, which acts as a back gate of the insulated gate transistor, and second and third active regions of the bipolar transistor formed in the well region. At least one of the second and third active regions is used in common to one of the source and drain regions of the insulated gate transistor. A plurality of well regions is regularly arranged to constitute a gate array.

摘要翻译： 双极晶体管/绝缘栅晶体管混合半导体器件包括形成在半导体衬底上的阱区，用作双极晶体管的第一有源区，在阱区中形成源区和漏区的绝缘栅晶体管，其作为 绝缘栅晶体管的背栅，以及形成在阱区中的双极晶体管的第二和第三有源区。 第二和第三有源区域中的至少一个共用于绝缘栅极晶体管的源极和漏极区域中的一个。 规则地布置多个阱区以构成栅极阵列。

公开(公告)号：US5250229A

公开(公告)日：1993-10-05

申请号：US774788

申请日：1991-10-10

申请人： Hiroyuki Hara ,  Marc H. La Branche ,  Barry E. Taylor

发明人： Hiroyuki Hara ,  Marc H. La Branche ,  Barry E. Taylor

IPC分类号： B23K35/22 ,  B23K35/363 ,  C04B41/51 ,  C04B41/88 ,  H01B1/16 ,  H01L21/48 ,  H01L23/498 ,  H05K1/09 ,  H05K3/12 ,  H05K3/38 ,  H01B1/00 ,  H01B1/02 ,  H01B1/08

CPC分类号： C04B41/88 ,  C04B41/009 ,  C04B41/5183 ,  H01B1/16 ,  H01L21/4867 ,  H01L23/49883 ,  H05K1/092 ,  C04B2111/00844 ,  H01L2924/0002

摘要： The invention is directed to a thermal cycle adhesion additive composition consisting essentially of an admixture of finely divided particles of oxides of bismuth, copper, lead, zinc, and transition metal and to conductive thick film compositions made therefrom.

摘要翻译： 本发明涉及一种热循环粘合添加剂组合物，其主要由铋，铜，铅，锌和过渡金属的氧化物的细碎颗粒的混合物和由其制成的导电厚膜组合物组成。

公开(公告)号：US4718035A

公开(公告)日：1988-01-05

申请号：US734078

申请日：1985-05-15

申请人： Hiroyuki Hara ,  Yasuhiro Sugimoto

发明人： Hiroyuki Hara ,  Yasuhiro Sugimoto

IPC分类号： G06F7/501 ,  G06F7/50 ,  G06F7/503 ,  H03K19/21

CPC分类号： G06F7/501 ,  G06F2207/4806

摘要： A logic operation circuit includes an exclusive-OR circuit for receiving first and second input signals, a carry output signal selection circuit for selectively generating a sum signal or an inverted signal thereof as a carry output signal in accordance with an output signal from the exclusive-OR circuit, and a carry output signal selection circuit for selectively generating a carry input signal or the first input signal as a sum signal in accordance with the output signal from the exclusive-OR circuit. The sum signal selection circuit has first and second differential amplifiers respectively driven by first and second output signals which are inverted to each other and received from the exclusive-OR circuit so as to generate the sum signal in accordance with the carry input signal, and the carry input signal selection circuit has third and fourth differential amplifiers respectively driven in accordance with the first and second output signals from the exclusive-OR circuit so as to generate carry output signals in accordance with the first input signal and carry input signal, respectively.

摘要翻译： 逻辑运算电路包括用于接收第一和第二输入信号的异或电路，进位输出信号选择电路，用于根据来自专用电路的输出信号选择性地产生和信号或其反相信号作为进位输出信号， OR电路，以及进位输出信号选择电路，用于根据来自异或电路的输出信号选择性地产生进位输入信号或第一输入信号作为和信号。 和信号选择电路具有分别由第一和第二输出信号驱动的第一和第二差分放大器，它们彼此反相并从异或电路接收，以便根据进位输入信号产生和信号， 输入信号选择电路具有分别根据来自异或电路的第一和第二输出信号驱动的第三和第四差分放大器，以便分别根据第一输入信号产生进位输出信号并传送输入信号。