公开(公告)号：US06658748B1

公开(公告)日：2003-12-09

申请号：US09679793

申请日：2000-10-05

Applicant: Dirk Leipold ,  Robert B. Staszewski

Inventor： Dirk Leipold ,  Robert B. Staszewski

IPC: H03B100

CPC classification number: H03L7/085 ,  H03B2201/0266 ,  H03K3/354 ,  H03L7/0991

Abstract: A fully digitally-controlled LC tank oscillator (DCO) uses a bank of more significant binary-weighted and/or less significant equally-weighted capacitors that are switched between only two voltage potentials. The time-averaged value of capacitance of predetermined less significant capacitors is determined by dithering between the two states to achieve a further refinement in the resolution of the resonating frequency.

Abstract translation: 完全数字控制的LC槽振荡器（DCO）使用一组更重要的二进制加权和/或较小重要的等效加权电容器，其在仅两个电压电位之间切换。 通过两个状态之间的抖动来确定预定的较低有效电容器的电容的时间平均值，以实现谐振频率的分辨率的进一步细化。

公开(公告)号：US20030090298A1

公开(公告)日：2003-05-15

申请号：US10254663

申请日：2002-09-26

Inventor： Masaru Sano

IPC: H03F003/45 ,  G11C007/00

CPC classification number: H03B5/1231 ,  H03B5/1215 ,  H03B5/1265 ,  H03B2201/0266 ,  H03J2200/10

Abstract: In an embodiment consistent with the present invention, a semiconductor device having a oscillating circuit comprises: a first transistor having a control electrode and having one end and the other end of a current path thereof; a second transistor having a control electrode and having one end and the other end of a current path thereof, the control electrode is coupled to one end of the current path of the first transistor and one end of the current path thereof is coupled to the control electrode of the first transistor; a current mirror circuit that supplies a current to one end of the current path of the first transistor and one end of the current path of the second transistor; an inductor coupled to one end of the current path of the first transistor and one end of the current path of the second transistor; a first capacitor coupled to one end of the current path of the first transistor and one end of the current path of the second transistor; and a second capacitor and a switch element coupled with, are coupled one end of the current path of the first transistor and one end of the current path of the second transistor.

Abstract translation: 在与本发明一致的实施例中，具有振荡电路的半导体器件包括：第一晶体管，具有控制电极，其一端和另一端具有电流通路; 具有控制电极并且具有电流通路的一端和另一端的第二晶体管，所述控制电极耦合到所述第一晶体管的电流通路的一端，并且其电流通路的一端与所述控制电极 第一晶体管的电极; 电流镜电路，其向第一晶体管的电流路径的一端和第二晶体管的电流路径的一端供给电流; 耦合到第一晶体管的电流路径的一端和第二晶体管的电流路径的一端的电感器; 耦合到所述第一晶体管的电流路径的一端和所述第二晶体管的电流路径的一端的第一电容器; 并且耦合有第二电容器和开关元件，耦合第一晶体管的电流路径的一端和第二晶体管的电流路径的一端。

公开(公告)号：US20030020544A1

公开(公告)日：2003-01-30

申请号：US10183552

申请日：2002-06-28

Applicant: Broadcom Corporation

Inventor： Arya R. Behzad

IPC: H03F003/45

CPC classification number: H03F1/3211 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0026 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/364 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H03L7/23 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection is substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.

公开(公告)号：US20010020875A1

公开(公告)日：2001-09-13

申请号：US09824277

申请日：2001-04-02

Applicant: Silicon Wave, Inc.

Inventor： Lars Gustaf Jansson

IPC: H03B005/12 ,  H03L007/099

CPC classification number: H03F3/45085 ,  H01L27/0805 ,  H03B5/1215 ,  H03B5/1231 ,  H03B5/124 ,  H03B5/1265 ,  H03B2201/0266 ,  H03B2201/0283 ,  H03F1/56 ,  H03F2203/45631 ,  H03F2203/45638 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/10 ,  H03L7/18

Abstract: A method and apparatus for digitally controlling the capacitance of an integrated circuit device using MOS-FET devices. In accordance with one aspect of the present invention, a one-bit or nullbinarynull varactor is presented wherein the gate-to-bulk capacitance of the MOS-FET device exhibits dependency to a D.C. voltage applied between its gate and well implant regions. The capacitance-voltage characteristic of the binary capacitor has three major regions: (1) a first relatively flat region having little or no voltage dependency and having a capacitance equal to a first low capacitance of C1; (2) a sloped region wherein a voltage dependency exists; and (3) a second relatively flat region where there is little or no voltage dependency and where the capacitance equals a second higher capacitance of C2. The capacitance of the binary capacitor can be changed from C1 to C2 simply by changing the polarity of the applied D.C. voltage from a positive to a negative value. A plurality of binary capacitors are configured in a parallel arrangement to produce a digitally controlled capacitor. The digitally controlled capacitor can be used in any integrated circuit requiring a tightly controlled tuned network. One application is a voltage-controlled oscillator (VCO) wherein the center output frequency of the VCO is calibrated by digitally modifying the capacitance of the VCO's digitally controlled capacitor. A means for determining whether the VCO requires calibration and a means for calibrating the center output frequency of the VCO is presented.

公开(公告)号：US06181218B2

公开(公告)日：2001-01-30

申请号：US09081542

申请日：1998-05-19

Applicant: Ricke W. Clark ,  Jorge A. Grilo ,  Bo Zhang

Inventor： Ricke W. Clark ,  Jorge A. Grilo ,  Bo Zhang

IPC: H01G438

CPC classification number: H03B5/32 ,  H03B2201/0266 ,  H03J2200/10

Abstract: The invention provides a unique apparatus and method which varies the capacitance coupled to a circuit. In one embodiment, the variable capacitance comprises a unique variable capacitance array with multiple capacitance modules which can be selectively enabled. Each capacitance module has a capacitive value and a corresponding parasitic capacitance. The invention provides high linearity, low spread, improves the response to power fluctuations by maintaining a consistent relationship between the capacitive value and the parasitic capacitance in each capacitance module. For example, the invention can be used with devices to provide a linear variation of capacitance. In addition, the invention can be used to calibrate a wide range of devices.

Abstract translation: 本发明提供了一种独特的装置和方法，其改变耦合到电路的电容。 在一个实施例中，可变电容包括具有多个电容模块的独特的可变电容阵列，其可被选择性地使能。 每个电容模块具有电容值和相应的寄生电容。 本发明通过保持每个电容模块中的电容值和寄生电容之间的一致关系，提供高线性度，低扩展性，从而改善对功率波动的响应。 例如，本发明可以与装置一起使用以提供电容的线性变化。 此外，本发明可用于校准各种各样的器件。

公开(公告)号：US20180198451A1

公开(公告)日：2018-07-12

申请号：US15803026

申请日：2017-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANGDON JUNG ,  DOKYUNG LIM ,  WOOSEOK KIM

IPC: H03L1/02 ,  H03B5/04 ,  H03B5/32 ,  H03B5/08 ,  H03B5/36

CPC classification number: H03L1/028 ,  H03B5/04 ,  H03B5/08 ,  H03B5/32 ,  H03B5/368 ,  H03B2201/0266 ,  H03L1/022 ,  H03L1/027

Abstract: A temperature compensated oscillation controller includes a temperature compensation circuit configured to provide a reference voltage through a first terminal and to receive an input voltage including temperature information through a second terminal, and an oscillation circuit configured to be connected to an external crystal resonator through third and fourth terminals and to output a clock signal in response to an oscillation signal from the external crystal resonator. The temperature compensation circuit is configured to perform a voltage controlled oscillator-based sensing operation to convert the input voltage into a temperature code and to adjust a frequency of the clock signal using the temperature code.

公开(公告)号：US20180159471A1

公开(公告)日：2018-06-07

申请号：US15370004

申请日：2016-12-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Chi Zhang

IPC: H03B5/12 ,  H01L27/12 ,  H01L29/06

CPC classification number: H01L29/0649 ,  H01L27/0811 ,  H01L27/1203 ,  H01L29/76 ,  H01L29/78 ,  H01L29/93 ,  H01L29/94 ,  H03B5/12 ,  H03B5/1206 ,  H03B5/1253 ,  H03B2201/0208 ,  H03B2201/0266

Abstract: A digitally controlled varactor device comprising: a set of bulk nMOS field effect transistors bulk tied to a ground, the set bulk nMOS field effect transistors having: a first transistor including: a source coupled to a DC voltage source; and a gate coupled to a digitally controlled oscillator; a second transistor including: a source coupled to the DC voltage source; and a gate coupled to the digitally controlled oscillator; and a third transistor including: a source coupled to a drain of the first transistor; and a drain coupled to a drain of the second transistor. The transistors in the digitally controlled varactor may be FDSOI nMOS devices with backgate coupled to a DC voltage source.

公开(公告)号：US20180131323A1

公开(公告)日：2018-05-10

申请号：US15714619

申请日：2017-09-25

Applicant: Huawei Technologies Co., Ltd.

Inventor： Yiyang Shu ,  Huizhen Qian ,  Xun Luo

IPC: H03B5/02 ,  H03B5/12

CPC classification number: H03B5/02 ,  H03B5/1212 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1296 ,  H03B27/00 ,  H03B2200/0074 ,  H03B2200/009 ,  H03B2201/0266

Abstract: A dual-mode oscillator and a multi-phase oscillator includes a mode switching circuit to switch between two operating modes and obtain oscillation signals having two different bands. The dual-mode oscillator also includes two transformer-coupled oscillators and a step-up transformer in the transformer-coupled oscillators where the step-up transformer multiplies a drain voltage swing of a first MOS transistor and then injects a voltage signal to a gate of a second MOS transistor to obtain a larger gate voltage swing without increasing a supply voltage of the oscillator. The dual-mode oscillators are connected through multi-phase coupled circuits to form a Mobius loop.

公开(公告)号：US09960734B2

公开(公告)日：2018-05-01

申请号：US14522534

申请日：2014-10-23

Applicant: The Trustees Of Columbia University In The City Of New York

Inventor： Changyao Chen ,  James Hone ,  Sunwoo Lee

IPC: H03B5/32 ,  H03B5/30 ,  H01L21/02 ,  H03H3/02 ,  H03H9/17 ,  H01L29/84 ,  H01L29/06 ,  H01L29/165 ,  H03H9/02 ,  H01L29/00 ,  G01J5/04 ,  G01J5/44 ,  H01L41/18

CPC classification number: H03B5/30 ,  G01J5/046 ,  G01J5/44 ,  H01L21/0262 ,  H01L29/00 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/84 ,  H01L41/18 ,  H03B2200/0022 ,  H03B2200/0048 ,  H03B2201/0266 ,  H03B2201/0275 ,  H03H3/02 ,  H03H9/02244 ,  H03H9/02433 ,  H03H9/17

Abstract: A nano-electro-mechanical systems (NEMS) oscillator can include an insulating substrate, a source electrode and a drain electrode, a metal local gate electrode, and a micron-sized, atomically thin graphene resonator. The source electrode and drain electrode can be disposed on the insulating substrate. The metal local gate electrode can be disposed on the insulating substrate. The graphene resonator can be suspended over the metal local gate electrode and define a vacuum gap between the graphene resonator and the metal local gate electrode.

公开(公告)号：US20170366137A1

公开(公告)日：2017-12-21

申请号：US15659204

申请日：2017-07-25

Applicant: Huawei Technologies Co., Ltd.

Inventor： Mina SHAHMOHAMMADI ,  Masoud BABAIE ,  Robert Bogdan STASZEWSKI

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1218 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1265 ,  H03B5/1296 ,  H03B2201/0266

Abstract: The invention relates to a resonator circuit, the resonator circuit comprising a transformer comprising a primary winding and a secondary winding, wherein the primary winding is inductively coupled with the secondary winding, a primary capacitor being connected to the primary winding, the primary capacitor and the primary winding forming a primary circuit, and a secondary capacitor being connected to the secondary winding, the secondary capacitor and the secondary winding forming a secondary circuit, wherein the resonator circuit has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.