公开(公告)号：US09847070B2

公开(公告)日：2017-12-19

申请号：US14520797

申请日：2014-10-22

Applicant: Apple Inc.

Inventor： Kwang Soon Park ,  Chun-Yao Huang ,  Shih Chang Chang

IPC: G09G3/36 ,  G06F3/041 ,  G11C19/18

CPC classification number: G09G3/3688 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0294 ,  G09G2310/063 ,  G09G2310/065 ,  G09G2310/08 ,  G09G2320/0209 ,  G11C19/184

Abstract: A display may have an array of pixels to display images. Gate line driver circuitry may have stages that supply gate line signals. A gate line may be located in each row of the pixels. Each stage may have an output block that produces a respective one of the gate line signals and may have a carry block that separately produces a carry signal that is provided to a later stage in the gate line driver circuitry. A memory may be provided in at least some of the stages to store signals produced by the output blocks during intraframe pausing operations. At the end of an intraframe pause, the stored signals may be used in restarting production of the gate line signals by output blocks in the gate line driver stages. Circuitry may be used to separately reset the output block and suppress carry signal production by the carry block.

公开(公告)号：US20170294499A1

公开(公告)日：2017-10-12

申请号：US15268106

申请日：2016-09-16

Applicant: Apple Inc.

Inventor： Chang Ming Lu ,  Chia-Yu Chen ,  Chih Pang Chang ,  Ching-Sang Chuang ,  Hung-Che Ting ,  Jung Yen Huang ,  Sheng Hui Shen ,  Shih Chang Chang ,  Tsung-Hsiang Shih ,  Yu-Wen Liu ,  Yu Hung Chen ,  Kai-Chieh Wu ,  Lun Tsai ,  Takahide Ishii ,  Chung-Wang Lee ,  Hsing-Chuan Wang ,  Chin Wei Hsu ,  Fu-Yu Teng

IPC: H01L27/32 ,  H01L51/56 ,  H01L23/532 ,  H01L21/027 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76834 ,  H01L21/02244 ,  H01L21/02252 ,  H01L21/02255 ,  H01L21/0273 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/77

Abstract: A component such as a display may have a substrate and thin-film circuitry on the substrate. The thin-film circuitry may be used to form an array of pixels for a display or other circuit structures. Metal traces may be formed among dielectric layers in the thin-film circuitry. Metal traces may be provided with insulating protective sidewall structures. The protective sidewall structures may be formed by treating exposed edge surfaces of the metal traces. A metal trace may have multiple layers such as a core metal layer sandwiched between barrier metal layers. The core metal layer may be formed from a metal that is subject to corrosion. The protective sidewall structures may help prevent corrosion in the core metal layer. Surface treatments such as oxidation, nitridation, and other processes may be used in forming the protective sidewall structures.

公开(公告)号：US09685557B2

公开(公告)日：2017-06-20

申请号：US13801261

申请日：2013-03-13

Applicant: APPLE INC.

Inventor： Cheng-Ho Yu ,  Young Bae Park ,  Shih Chang Chang ,  Ting-Kuo Chang ,  Shang-Chih Lin

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/78651 ,  H01L27/1288 ,  H01L29/6675 ,  H01L29/78621 ,  H01L29/78645

Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack. The TFT stack includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes removing the first photoresist layer, and depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area. The method further includes doping the second portion of the doped semiconductor layer with a third doping dose, the first dose being higher than the second dose and the third dose.

公开(公告)号：US20170162113A1

公开(公告)日：2017-06-08

申请号：US15263803

申请日：2016-09-13

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Hung Sheng Lin ,  Shih Chang Chang ,  Shinya Ono

IPC: G09G3/3233 ,  G09G3/3275 ,  H01L27/12 ,  G09G3/3266

CPC classification number: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0202 ,  G09G2320/0295 ,  G09G2320/043 ,  H01L27/1225 ,  H01L29/78651 ,  H01L29/7869

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

公开(公告)号：US09647048B2

公开(公告)日：2017-05-09

申请号：US14315202

申请日：2014-06-25

Applicant: Apple Inc.

Inventor： Shih Chang Chang ,  Vasudha Gupta ,  Young Bae Park

IPC: H01L27/32 ,  G09G3/32 ,  G09G3/3233

CPC classification number: H01L27/3265 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/043 ,  H01L27/3262

Abstract: A display may have an array of organic light-emitting diode display pixels. Each display pixel may have a light-emitting diode that emits light under control of a thin-film drive transistor. Each display pixel may have thin-film transistors and capacitor structures that form a circuit for compensating the drive transistor for threshold voltage variations. The capacitor structures may be formed from interleaved stacked conductive plates. The conductive plates may be formed from layers of material that are used in forming the drive transistor and other thin-film transistors such as a semiconductor layer, a first metal layer, a second metal layer, a third metal layer, and interposed dielectric layers.

公开(公告)号：US09615448B2

公开(公告)日：2017-04-04

申请号：US14211396

申请日：2014-03-14

Applicant: Apple Inc.

Inventor： Casey J. Feinstein ,  John Z. Zhong ,  Steve Porter Hotelling ,  Shih Chang Chang

IPC: C30B33/00 ,  B44C1/22 ,  H05K1/02 ,  B24B7/24 ,  C03C15/00 ,  C03C19/00

CPC classification number: H05K1/0274 ,  B24B7/241 ,  B24B7/242 ,  C03C15/00 ,  C03C19/00 ,  Y10T428/24926 ,  Y10T428/266

Abstract: Fabrication of thin sheets of glass or other substrate material for use in devices such as touch sensor panels is disclosed. A pair of thick glass sheets, typically with thicknesses of 0.5 mm or greater each, may each be patterned with thin film on a surface, sealed together to form a sandwich with the patterned surfaces facing each other and spaced apart by removable spacers, either or both thinned on their outside surfaces to thicknesses of less than 0.5 mm each, and separated into two thin glass sheets. A single thick glass sheet, typically with a thickness of 0.5 mm or greater, may be patterned, covered with a protective layer over the pattern, thinned on its outside surface to a thickness of less than 0.5 mm, and the protective layer removed. This thinness of less than 0.5 mm may be accomplished using standard LCD equipment, despite the equipment having a sheet minimum thickness requirement of 0.5 mm.

公开(公告)号：US09606382B2

公开(公告)日：2017-03-28

申请号：US14712311

申请日：2015-05-14

Applicant: Apple Inc.

Inventor： Young-Jik Jo ,  Chun-Yao Huang ,  Hao-Lin Chiu ,  Kwang Soon Park ,  Shih Chang Chang

IPC: G09G3/34 ,  G02F1/133 ,  G02F1/1343

CPC classification number: G02F1/13306 ,  G02F1/134336 ,  G09G3/3655

Abstract: A display has an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The pixels may be liquid crystal display pixels. Each pixel may have a common electrode voltage terminal. The display may have a transparent conductive film that forms a common electrode voltage layer that overlaps that array and that is shorted to the common electrode voltage terminals of the pixels. Metal common electrode voltage lines may run across the transparent conductive film to reduce resistance. Metal common electrode voltage paths that are coupled to the metal common electrode voltage lines may run along the left and right edge of the display. Common electrode voltage compensation circuits may receive feedback from the metal common electrode voltage paths. There may be two or more common electrode voltage compensation circuits for both the left and right edges of the display.

公开(公告)号：US20170084247A1

公开(公告)日：2017-03-23

申请号：US14860397

申请日：2015-09-21

Applicant: APPLE INC.

Inventor： Byung Duk Yang ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Patrick B. Bennett ,  Shih Chang Chang ,  Wonjae Choi ,  Hao-Lin Chiu ,  Kwang Soon Park ,  Xinyu Zhu

IPC: G09G5/00

CPC classification number: G09G5/003 ,  G02F2001/13456 ,  G09G3/20 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2310/0278 ,  G09G2310/0281 ,  G09G2320/0204 ,  G09G2320/0209 ,  G09G2320/0219 ,  G09G2330/021

Abstract: A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

公开(公告)号：US20170084214A1

公开(公告)日：2017-03-23

申请号：US15162974

申请日：2016-05-24

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Chun-Yao Huang ,  Hao-Lin Chiu ,  Ivan Knez ,  Patrick B. Bennett ,  Shih Chang Chang ,  Byung Duk Yang

IPC: G09G3/20 ,  H01L27/12

CPC classification number: G09G3/20 ,  G02F1/136286 ,  G02F2001/13456 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2300/043 ,  G09G2300/08 ,  G09G2310/0278 ,  G09G2310/0281 ,  G09G2320/0209 ,  G09G2320/0219 ,  H01L27/124

Abstract: A display may have an array of pixels arranged in rows and columns. Display driver circuitry may be provided along an edge of the display. Data lines that are associated with columns of the pixels may be used to distribute data from the display driver circuitry to the pixels. Gate lines in the display may each have a horizontal straight portion that extends along a respective row of the pixels and may each have one or more non-horizontal segments such as zigzag segments. The non-horizontal portion of each gate line may be connected to the horizontal straight portion of the gate line by a via. The non-horizontal portions may each have portions that are overlapped by portions of the data lines. Dummy gate line structures may be provided on the display that are not coupled to any of the pixels in the display.

公开(公告)号：US09601557B2

公开(公告)日：2017-03-21

申请号：US13837311

申请日：2013-03-15

Applicant: Apple Inc.

Inventor： Byung Duk Yang ,  John Z. Zhong ,  Shih Chang Chang ,  Vasudha Gupta ,  Young Bae Park

IPC: H01L27/32 ,  H01L27/12

CPC classification number: H01L27/3276 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1244 ,  H01L27/1248 ,  H01L2251/5338

Abstract: A flexible display having an array of pixels or sub-pixels is provided. The display includes a flexible substrate and an array of thin film transistors (TFTs) corresponding to the array of pixels or sub-pixels on the substrate. The display also includes a first plurality of metal lines coupled to gate electrodes of the TFTs and a second plurality of metal lines coupled to source electrodes and drain electrodes of the TFTs. At least one of the first plurality of metal lines and the second plurality of metal lines comprises a non-stretchable portion in the TFT areas and a stretchable portion outside the TFT areas.