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公开(公告)号:US20250040186A1
公开(公告)日:2025-01-30
申请号:US18227275
申请日:2023-07-27
Applicant: Applied Materials, Inc.
Inventor: Yan ZHANG , Taegon KIM , Johannes M. VAN MEER , Vikram M. BHOSLE , Jae Young LEE , Naushad K. VARIAM
IPC: H01L29/423 , H01L21/768 , H01L29/06 , H01L29/66 , H01L29/786
Abstract: Approaches herein provide devices and methods for forming gate-all-around transistors with improved gate spacer k-values. One method may include forming a gate-all-around (GAA) stack including a plurality of alternating first layers and second layers, and forming a source/drain (S/D) cavity through the plurality of alternating first layers and second layers. The method may further include forming an inner spacer in the S/D cavity, adjacent the plurality of alternating first layers and second layers, performing a first implant by directing fluorine ions to the GAA stack, through the S/D cavity, wherein the first implant is performed at a temperature greater than 30° Celsius and forming a S/D material in the S/D cavity following the first implant.
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公开(公告)号:US20250038053A1
公开(公告)日:2025-01-30
申请号:US18361326
申请日:2023-07-28
Applicant: Applied Materials, Inc.
Inventor: Zhepeng Cong , Tao Sheng , Ala Moradian
Abstract: A method of analyzing completion of seasoning of semiconductor processing chambers may include training a model using seasoning cycle characteristics data obtained from existing semiconductor processing chambers. A supervised learning process may label the characteristics data based on expert determined identify seasoning completion and may optionally label the characteristics data based on chamber open event information or preventive maintenance information. The trained model may be used to characterize another chamber during seasoning to determine whether seasoning is completed and/or when or how long or how many seasoning cycles may be performed until seasoning is complete.
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公开(公告)号:US20250037996A1
公开(公告)日:2025-01-30
申请号:US18913024
申请日:2024-10-11
Applicant: Applied Materials, Inc.
Inventor: Qinghua Zhao , Rui Cheng , Ruiyun Huang , Dong Hyung Lee , Aykut Aydin , Karthik Janakiraman
IPC: H01L21/02 , H01L21/3205
Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more recessed features along the substrate and a seam or void may be defined by the silicon-containing material within at least one of the one or more recessed features along the substrate. The methods may also include treating the silicon-containing material with a hydrogen-containing gas, such as plasma effluents of the hydrogen-containing gas, which may cause a size of the seam or void to be reduced.
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公开(公告)号:US20250037980A1
公开(公告)日:2025-01-30
申请号:US18359772
申请日:2023-07-26
Applicant: Applied Materials, Inc.
Inventor: Rupankar Choudhury , Sanjay G. Kamath , Juan Carlos Rocha-Alvarez , Sridhar Bachu , Mukesh Singh Dhami , Dan-il Yoon
IPC: H01J37/32 , C23C16/44 , C23C16/455
Abstract: A processing chamber and port adaptor are provided. Processing chambers include a chamber body having a lid coupled to the first end of the chamber body, a gas ring adjacent the first end of the chamber body, and a substrate support, where a processing region is defined between the substrate support and the lid. The processing chamber includes a port adapter coupled to the second end of the chamber body. The port adapter includes a body defining a plurality of apertures in fluid communication with the processing region, where each of the apertures are spaced apart along the body such that a distance between adjacent apertures is within about 20% of an average aperture spacing distance, an individually controllable valve fluidly coupled to one or more of the plurality of apertures, and an exhaust system in fluid communication with a system foreline and the plurality of apertures.
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公开(公告)号:US20250037978A1
公开(公告)日:2025-01-30
申请号:US18225454
申请日:2023-07-24
Applicant: Applied Materials, Inc.
Inventor: Sanjeev Baluja , Chaowei Wang , Kevin Griffin , Kenneth Brian Doering , Hanhong Chen , Joseph AuBuchon
Abstract: Gas distribution assemblies for semiconductor devices are described. The gas distribution assemblies include a backplate, a faceplate, a counterbored hole, and at least one orifice. The at least one orifice includes, for example, at least one straight orifice, or at least two angled orifices. Some embodiments of the gas distribution assemblies provide for reduced plasma damage in a processing chamber. Some embodiments of the gas distribution assemblies provide for reduced jetting on a substrate in a processing chamber. Methods of reducing plasma damage in gas distribution assemblies are also described.
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公开(公告)号:US12211736B2
公开(公告)日:2025-01-28
申请号:US17515773
申请日:2021-11-01
Applicant: Applied Materials, Inc.
Inventor: Hurshvardhan Srivastava , Keith T. Wong
IPC: H01L21/762 , C23C16/40 , H01L21/02 , H01J37/32
Abstract: Exemplary deposition methods may include introducing a vapor of a metal alkoxide into a processing volume of a semiconductor processing chamber. A substrate defining a trench may be housed in the processing volume. The methods may include condensing the vapor into a liquid metal alkoxide within the trench on the substrate. The methods may include forming a plasma external to the processing volume of the semiconductor processing chamber. The methods may include introducing plasma-generated species into the processing volume. The methods may include exposing the liquid metal alkoxide in the trench to the plasma-generated species. The methods may also include forming a metal oxide film in the trench through a reaction between the liquid metal alkoxide and the plasma-generated species.
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公开(公告)号:US12211677B2
公开(公告)日:2025-01-28
申请号:US17382332
申请日:2021-07-21
Applicant: Applied Materials, Inc.
Inventor: Vladimir Nagorny , Rene George
Abstract: A system and method including a processing device. The processing device receives data including one or more plasma exposure durations of a plasma process. The plasma exposure duration are associated with a set of controlled elements. The processing device causes a each set of controlled elements to switch between a first mode of operation and a second mode of operation. Each set of controlled elements expose appropriate portion of a substrate to the plasma related fluxes. The first set of controlled elements process the substrate at an increased rate while operating in the first mode of operation relative to the second mode of operation. The processing device causes each set of controlled elements to operate in the first mode of operation for the appropriate time duration based on the received plasma exposure duration data.
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公开(公告)号:US12209663B2
公开(公告)日:2025-01-28
申请号:US18215604
申请日:2023-06-28
Applicant: Applied Materials, Inc.
Inventor: Yao-Hung Yang , Chih-Yang Chang , Sam Hyungsam Kim
Abstract: A sealing member includes a monolithic body including a first portion adjoining a second portion. The first portion forms part of a circle. The second portion includes first and second lobes. Each lobe adjoins the first portion with a concave surface. In one example, each lobe includes a rounded tip, and a convex surface extends from one rounded tip to the other rounded tip.
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129.
公开(公告)号:US20250029850A1
公开(公告)日:2025-01-23
申请号:US18224996
申请日:2023-07-21
Applicant: Applied Materials, Inc.
Inventor: Kim Ramkumar VELLORE , Tetsuya ISHIKAWA , Ala MORADIAN
IPC: H01L21/67 , H01L21/66 , H01L21/687
Abstract: The present disclosure relates to methods of analyzing uniformity for substrate processing, and related apparatus and systems, for semiconductor manufacturing. In one or more embodiments, a non-uniformity is indicated, and the non-uniformity is a temperature non-uniformity and/or a physical non-uniformity. In one or more embodiments, a signal profile is accepted or rejected. In one or more embodiments, a method of analyzing uniformity for substrate processing applicable for semiconductor manufacturing includes heating an internal volume of a processing chamber using a target value. The method includes rotating a substrate support, and scanning, while rotating the substrate support, a sensor across one or more sections to take a plurality of readings. The method includes generating a signal profile including the plurality of readings, and analyzing the signal profile by comparing the signal profile to a range.
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公开(公告)号:US20250029849A1
公开(公告)日:2025-01-23
申请号:US18223184
申请日:2023-07-18
Applicant: Applied Materials, Inc.
Inventor: Anish Janakiraman , Mayur Govind Kulkarni , Deenesh Padhi
IPC: H01L21/67 , H01L21/687
Abstract: Exemplary semiconductor processing chambers may include a chamber body. The chambers may include a substrate support within the chamber body. The substrate support may define a substrate support surface. The chambers may include a faceplate supported atop the chamber body. The substrate support and a bottom surface of the faceplate may at least partially define a processing region. The bottom surface of the faceplate may define an annular protrusion that is directly above at least a portion of a radially outer 10% of the substrate support surface and an annular groove that is positioned radially outward of the annular protrusion. At least a portion of the annular groove may extend radially outward beyond the substrate support surface. The faceplate may define apertures through the faceplate. A first subset of the apertures may extend through the annular protrusion and a second subset of the apertures may extend through the annular groove.
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