公开(公告)号：US09037929B2

公开(公告)日：2015-05-19

申请号：US13225621

申请日：2011-09-06

Applicant: Jung Hwan Lee ,  Seong Je Park

Inventor： Jung Hwan Lee ,  Seong Je Park

IPC: G11C29/00 ,  G11C16/34 ,  G11C16/10 ,  G06F11/10 ,  G11C16/04

CPC classification number: G11C16/3459 ,  G06F11/1048 ,  G11C16/0483 ,  G11C16/10

Abstract: A method of operating a semiconductor memory device according to an aspect of the present disclosure includes performing a program loop, including a program operation and a program verification operation, in order to store input data in selected memory cells, performing a first error bit check operation for comparing the number of error bits of data not identical with the input data, with the number of correctable error bits, if the number of error bits is equal to or smaller than the number of correctable error bits, performing a second error bit check operation for comparing the number of error bits with the reference number of bits for replacement determination, and if the number of error bits is greater than the reference number of bits for replacement determination, updating failed column address information by adding the column address of a memory cell, having the error bits, to the failed column address information.

Abstract translation: 根据本公开的一个方面的操作半导体存储器件的方法包括执行包括程序操作和程序验证操作的程序循环，以便将输入数据存储在所选择的存储器单元中，执行第一错误位检查操作 用于将与输入数据不同的数据的错误位的数量与可校正错误位的数量进行比较，如果错误位的数量等于或小于可校正错误位的数量，则执行第二错误位检查操作 用于将错误位数与用于替换确定的参考比特数进行比较，并且如果错误位的数量大于用于替换确定的参考比特数，则通过将存储器单元的列地址相加来更新故障列地址信息 具有错误位，失败的列地址信息。

公开(公告)号：US08785132B2

公开(公告)日：2014-07-22

申请号：US13092209

申请日：2011-04-22

Applicant: Young-Chan Chae ,  Youn-Dong Kim ,  Jung-Hwan Lee ,  Ki-Seok Kim ,  Dong-II Han ,  Bum-Su Park ,  Seung-Jin Lee ,  Jong-Hun Im ,  Jong-In Kim ,  Sung-Ho Ryu ,  Sung-Key Jang

Inventor： Young-Chan Chae ,  Youn-Dong Kim ,  Jung-Hwan Lee ,  Ki-Seok Kim ,  Dong-II Han ,  Bum-Su Park ,  Seung-Jin Lee ,  Jong-Hun Im ,  Jong-In Kim ,  Sung-Ho Ryu ,  Sung-Key Jang

IPC: C12Q1/68 ,  G01N33/53

CPC classification number: G01N33/5308

Abstract: The present invention provides methods for identifying the plurality of aptamers that bind to different sites of a target molecule and methods for using the same, for example, in sandwich assays. In particular, the plurality of aptamers binding to different sites of the target molecules is identified from a library of aptamers identified from the same SELEX process.

Abstract translation: 本发明提供用于鉴定结合靶分子的不同位点的多个适体的方法以及使用其的方法，例如在夹心测定中。 特别地，从相同SELEX过程鉴定的适配体文库中鉴定结合靶分子不同位点的多个适体。

公开(公告)号：US08750048B2

公开(公告)日：2014-06-10

申请号：US13238435

申请日：2011-09-21

Applicant: Myung Cho ,  Seong-Je Park ,  Jung-Hwan Lee ,  Ji-Hwan Kim ,  Beom-Seok Hah

Inventor： Myung Cho ,  Seong-Je Park ,  Jung-Hwan Lee ,  Ji-Hwan Kim ,  Beom-Seok Hah

IPC: G11C16/34 ,  G11C16/28 ,  G11C16/06 ,  G11C16/26

CPC classification number: G11C11/5642 ,  G11C16/0483 ,  G11C2211/5646

Abstract: A memory includes at least one first flag cell configured to store first flag data, at least one second flag cell configured to store second flag data, at least one first sensing node having a voltage level determined by the first flag data of the first flag cell, at least one second sensing having a voltage level determined by the second flag data of the second flag cell, a selection circuit configured to select the first sensing node or the second sensing node in response to a flag address; and a determination circuit having an internal node through which current corresponding to a voltage level of a selected sensing node flows and configured to determine a logic value of flag data corresponding to the selected sensing node among the first and second flag data by using an amount of current flowing through the internal node.

Abstract translation: 存储器包括被配置为存储第一标志数据的至少一个第一标志单元，被配置为存储第二标志数据的至少一个第二标志单元，具有由第一标志单元的第一标志数据确定的电压电平的至少一个第一感测节点 至少一个第二感测具有由第二标志单元的第二标志数据确定的电压电平，选择电路被配置为响应于标志地址选择第一感测节点或第二感测节点; 以及确定电路，其具有内部节点，通过所述内部节点流过与所选择的感测节点的电压电平相对应的电流，并且被配置为通过使用一定数量的第一和第二标志数据来确定与所选择的感测节点对应的标志数据的逻辑值 电流流过内部节点。

公开(公告)号：US08665298B2

公开(公告)日：2014-03-04

申请号：US12883332

申请日：2010-09-16

Applicant: Hee-Jung Hong ,  Eui-Yeol Oh ,  Si-Hoon Lee ,  Jung-Hwan Lee

Inventor： Hee-Jung Hong ,  Eui-Yeol Oh ,  Si-Hoon Lee ,  Jung-Hwan Lee

IPC: G09G5/10

CPC classification number: G09G3/3426 ,  G02F2001/133601 ,  G09G2320/0646

Abstract: Disclosed is a method for analyzing a light profile of a light source includes driving a light source of one of a plurality of blocks which divide a backlight unit, setting a light analyzing region matched to one light emission region of the light source, dividing the light analyzing region into at least two symmetric regions considering a form of the light emission region and symmetry of the light emission region, and analyzing and storing a light profile of one of the at least two symmetric regions.

Abstract translation: 公开了一种用于分析光源的光分布的方法，包括驱动分割背光单元的多个块中的一个的光源，设置与光源的一个发光区域匹配的光分析区域， 考虑到发光区域的形式和发光区域的对称性，将区域分析成至少两个对称区域，以及分析和存储至少两个对称区域中的一个的光谱。

公开(公告)号：US20140015574A1

公开(公告)日：2014-01-16

申请号：US13603539

申请日：2012-09-05

Applicant: Jung-Hwan LEE

Inventor： Jung-Hwan LEE

IPC: H03L7/08

CPC classification number: H03L7/0816 ,  H03L7/0814

Abstract: A semiconductor device includes a delay locked loop (DLL) configured to generate a DLL clock signal by delaying a reference clock signal in response to a second delay amount tracked using a first delay amount as an initial delay amount, and track the second delay amount again by adjusting the first delay amount in response to a reset signal, and a DLL controller configured to activate the reset signal when the second delay amount deviates from a given range.

Abstract translation: 半导体器件包括延迟锁定环（DLL），其被配置为通过响应于使用第一延迟量跟踪的第二延迟量作为初始延迟量来延迟参考时钟信号来生成DLL时钟信号，并且再次跟踪第二延迟量 通过响应于复位信号调整第一延迟量，以及DLL控制器，被配置为当第二延迟量偏离给定范围时激活复位信号。

公开(公告)号：US08619023B2

公开(公告)日：2013-12-31

申请号：US12604820

申请日：2009-10-23

Applicant: Kyu-Cheol Park ,  Jung-Hwan Lee ,  Won-Jang Park ,  Byung-Chun Sakong ,  Sang-Bum Kim ,  Woo-Hee Yang

Inventor： Kyu-Cheol Park ,  Jung-Hwan Lee ,  Won-Jang Park ,  Byung-Chun Sakong ,  Sang-Bum Kim ,  Woo-Hee Yang

IPC: G09G5/00

CPC classification number: G06F3/0346

Abstract: Provided is an input device for operating in a three-dimensional space and inputting user instructions. The input device includes a first operation unit that calculates a first rotation angle in a coordinate system independent of the attitude of the device based on the output value of a first sensor, a second operation unit that calculates a second rotation angle in the coordinate system based on the output value of a second sensor, an attitude angle measuring unit that calculates the attitude angle of the input device by combining the first rotation angle and the second rotation angle, and an intensity calculation unit that calculates force intensity in the coordinate system using acceleration of the input device and the attitude angle of the input device obtained in the attitude measuring unit.

Abstract translation: 提供了一种用于在三维空间中操作并输入用户指令的输入装置。 输入装置包括第一操作单元，其基于第一传感器的输出值，计算独立于设备姿态的坐标系中的第一旋转角度，第二操作单元，其以坐标系为基础计算第二旋转角度 在第二传感器的输出值上，姿态角测量单元，其通过组合第一旋转角度和第二旋转角度来计算输入装置的姿态角度;以及强度计算单元，其使用加速度来计算坐标系中的力强度 和姿态测量单元中获得的输入装置的姿态角。

公开(公告)号：US08570349B2

公开(公告)日：2013-10-29

申请号：US12827537

申请日：2010-06-30

Applicant: Kyung-Joon Kwon ,  Si-Hoon Lee ,  Jung-Hwan Lee

Inventor： Kyung-Joon Kwon ,  Si-Hoon Lee ,  Jung-Hwan Lee

IPC: G09G5/10 ,  G09G3/36

CPC classification number: G09G3/3426 ,  G09G2320/02 ,  G09G2320/0646 ,  G09G2360/16

Abstract: A method for dividing a display area for local dimming of LCD is disclosed. The method includes determining an initial number of pixels per data analysis area and a total number of residual pixels, calculating a first residual pixel sum of a current data analysis area using the total number of residual pixels and a second residual pixel sum of a previous data analysis area, determining whether to assign a residual pixel to the current data analysis area using the first residual pixel sum and the total number of data analysis areas, calculating a second residual sum of the current data analysis area whether to assign a residual pixel, and repeating the calculation above until the data analysis area index is a last data analysis area index.

Abstract translation: 公开了一种用于划分LCD的局部调光显示区域的方法。 该方法包括：确定每个数据分析区域的像素的初始数目和残余像素的总数，使用剩余像素的总数和先前数据的第二残差像素和来计算当前数据分析区域的第一残差像素和 分析区域，使用第一残差像素和数据分析区域的总数确定是否向当前数据分析区域分配残差像素，计算当前数据分析区域是否分配残差像素的第二残差和，以及 重复上述计算直到数据分析区域索引为最后数据分析区域索引。

公开(公告)号：US08569252B2

公开(公告)日：2013-10-29

申请号：US12759813

申请日：2010-04-14

Applicant: Jung-Hwan Lee ,  Soon-Hag Kim ,  Mi-Jin Kwon ,  Hyun-Gu Kang ,  Sung-Ho Ryu ,  Jong-In Kim ,  Youn-Dong Kim ,  Young-Chan Chae ,  Sung-Key Jang ,  Jong-Hun Im ,  Sun-Hak Lee ,  Hye-Jung Lee ,  Eun-Jung Jang ,  Ki-Seok Kim

Inventor： Jung-Hwan Lee ,  Soon-Hag Kim ,  Mi-Jin Kwon ,  Hyun-Gu Kang ,  Sung-Ho Ryu ,  Jong-In Kim ,  Youn-Dong Kim ,  Young-Chan Chae ,  Sung-Key Jang ,  Jong-Hun Im ,  Sun-Hak Lee ,  Hye-Jung Lee ,  Eun-Jung Jang ,  Ki-Seok Kim

IPC: C12N15/11

CPC classification number: G01N33/57496 ,  C12N15/115 ,  C12N2310/16 ,  C12N2310/335

Abstract: Improved G-rich oligonucleotide (GRO) aptamers specific to nucleolin, a method of preparing the aptamers, and a use of the aptamers for diagnosing and/or treating a nucleolin-associated disease, are provided.

Abstract translation: 提供了改进的对核仁林特异性的富G寡核苷酸（GRO）适配体，制备适体的方法，以及适配体用于诊断和/或治疗核仁素相关疾病的用途。

公开(公告)号：US08456925B2

公开(公告)日：2013-06-04

申请号：US12975981

申请日：2010-12-22

Applicant: Jung-Hwan Lee

Inventor： Jung-Hwan Lee

IPC: G11C11/34

CPC classification number: G11C7/1042 ,  G11C16/10 ,  G11C16/26 ,  G11C16/32

Abstract: A non-volatile memory device includes a plurality of input pads, a buffer configured to buffer data inputted through the plurality of the input pads in synchronization with a write enable signal, an even latch configured to store a first buffered data outputted from the buffer in response to an even write enable signal, an odd latch configured to store a second buffered data outputted from the buffer in response to an odd write enable signal, and a transfer unit configured to transfer stored data in the even latch and the odd latch to a selected bank of a plane in response to a bank selection signal.

Abstract translation: 非易失性存储器件包括多个输入焊盘，缓冲器被配置为与写使能信​​号同步地缓冲通过多个输入焊盘输入的数据;偶数锁存器，被配置为存储从缓冲器输出的第一缓冲数据 响应于偶写入使能信号，奇数锁存器被配置为存储响应于奇数写使能信号从缓冲器输出的第二缓冲数据;以及传送单元，被配置为将偶锁存器和奇锁存器中的存储数据传送到 响应于银行选择信号选择一个平面的银行。

公开(公告)号：US08451665B2

公开(公告)日：2013-05-28

申请号：US13232304

申请日：2011-09-14

Applicant: Seong-Je Park ,  Jung-Hwan Lee ,  Ji-Hwan Kim ,  Myung Cho ,  Beom-Seok Hah

Inventor： Seong-Je Park ,  Jung-Hwan Lee ,  Ji-Hwan Kim ,  Myung Cho ,  Beom-Seok Hah

IPC: G11C16/04

CPC classification number: G11C11/5628 ,  G11C11/5635 ,  G11C16/0483 ,  G11C16/16

Abstract: A method for operating a non-volatile memory device includes selecting a word line of a plurality of word lines in response to a program command and an received address, determining whether the selected word line is a word line set among the word lines, performing an erase operation on a second word line group of the word lines in response to a result of the determining, and performing a program operation on the selected word line.

Abstract translation: 用于操作非易失性存储器件的方法包括响应于程序命令和接收到的地址选择多个字线的字线，确定所选择的字线是否是字线中的字线，执行 响应于所述确定的结果对所述字线的第二字线组进行擦除操作，以及对所选择的字线执行编程操作。