公开(公告)号：US20120022779A1

公开(公告)日：2012-01-26

申请号：US13189101

申请日：2011-07-22

Applicant: Jung-Hwan LEE

Inventor： Jung-Hwan LEE

IPC: G01C21/00

CPC classification number: G01S19/21 ,  G01S19/34

Abstract: An apparatus and method for determining position using signals received by a navigation receiver. The device for determining position within a navigation network, the device including a receiver circuit for receiving positioning signals from a plurality of transmitters within the navigation network, a memory for storing the received positioning signals, and an auxiliary circuit for, when operating, generating interference which may affect reception of the positioning signals.

Abstract translation: 一种用于使用由导航接收机接收的信号来确定位置的装置和方法。 用于确定导航网络内的位置的装置，该装置包括用于从导航网络内的多个发射机接收定位信号的接收机电路，用于存储所接收的定位信号的存储器和用于在运行时产生干扰的辅助电路 这可能会影响定位信号的接收。

公开(公告)号：US20100093994A1

公开(公告)日：2010-04-15

申请号：US12559666

申请日：2009-09-15

Applicant: Jung-Hwan LEE ,  Hyun-Gu Kang ,  Sung-Ho Ryu ,  Jong-In Kim ,  Sun-Hak Lee ,  Hye-Jung Lee ,  Eun-Jung Jang

Inventor： Jung-Hwan LEE ,  Hyun-Gu Kang ,  Sung-Ho Ryu ,  Jong-In Kim ,  Sun-Hak Lee ,  Hye-Jung Lee ,  Eun-Jung Jang

IPC: C08B37/00

CPC classification number: C07H21/04 ,  Y02P20/55

Abstract: A method for preparing amino linker oligonucleotides is provided, wherein an amino protecting group is efficiently removed from the amino linker oligonucleotides protected by the protecting group, and thereby achieving a high yield of the amino linker oligonucleotides.

Abstract translation: 提供了制备氨基接头寡核苷酸的方法，其中氨基保护基被有效地从保护基保护的氨基接头寡核苷酸中除去，从而达到高产量的氨基接头寡核苷酸。

公开(公告)号：US20140015574A1

公开(公告)日：2014-01-16

申请号：US13603539

申请日：2012-09-05

Applicant: Jung-Hwan LEE

Inventor： Jung-Hwan LEE

IPC: H03L7/08

CPC classification number: H03L7/0816 ,  H03L7/0814

Abstract: A semiconductor device includes a delay locked loop (DLL) configured to generate a DLL clock signal by delaying a reference clock signal in response to a second delay amount tracked using a first delay amount as an initial delay amount, and track the second delay amount again by adjusting the first delay amount in response to a reset signal, and a DLL controller configured to activate the reset signal when the second delay amount deviates from a given range.

Abstract translation: 半导体器件包括延迟锁定环（DLL），其被配置为通过响应于使用第一延迟量跟踪的第二延迟量作为初始延迟量来延迟参考时钟信号来生成DLL时钟信号，并且再次跟踪第二延迟量 通过响应于复位信号调整第一延迟量，以及DLL控制器，被配置为当第二延迟量偏离给定范围时激活复位信号。

公开(公告)号：US20120108271A1

公开(公告)日：2012-05-03

申请号：US13349135

申请日：2012-01-12

Applicant: Jung-Hwan LEE

Inventor： Jung-Hwan LEE

IPC: H04W24/00

CPC classification number: H04W48/08 ,  H04L67/18 ,  H04W4/02

Abstract: A method of using radio signals transmitted for reception by mobile user equipment that includes receiving, with mobile user equipment (UE), radio signals having at least one format; monitoring, with the mobile user equipment, at least one property of the received radio signals; identifying a pattern in said monitored property or properties; and in response to identifying said pattern, triggering at least one action according to the identified pattern, and/or providing the UE with an indication of a location of the UE based at least part of the identified pattern.

Abstract translation: 一种使用由移动用户设备接收发送的无线电信号的方法，包括：利用移动用户设备（UE）接收具有至少一种格式的无线电信号; 用移动用户设备监视所接收的无线电信号的至少一个属性; 识别所述监控的属性或属性中的模式; 并且响应于识别所述模式，根据所识别的模式触发至少一个动作，和/或基于所识别的模式的至少一部分向UE提供UE的位置的指示。

公开(公告)号：US20090100279A1

公开(公告)日：2009-04-16

申请号：US12249670

申请日：2008-10-10

Applicant: Jung-Hwan LEE

Inventor： Jung-Hwan LEE

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/3246 ,  G06F1/3287 ,  Y02D10/171

Abstract: The present invention relates to a computer providing a motion picture mode including at least one storage unit configured to store system state information when the computer enters the motion picture mode and to store motion picture data, the storage unit including a random access memory (RAM) and a hard disk drive (HDD), a graphic processing unit configured to process image data and to display processed data on a screen, an audio outputting unit configured to process and output audio signals, and a control unit configured to control modules included in the computer and a system mode of the computer. The control unit is configured to determine whether conditions for entering the motion picture mode have been satisfied, and to change the system mode to the motion picture mode if the conditions for the motion picture mode are satisfied.

Abstract translation: 本发明涉及一种提供运动图像模式的计算机，包括：至少一个存储单元，被配置为当计算机进入运动图像模式时存储系统状态信息并存储运动图像数据，该存储单元包括随机存取存储器（RAM） 以及硬盘驱动器（HDD），被配置为处理图像数据并在屏幕上显示处理数据的图形处理单元，被配置为处理和输出音频信号的音频输出单元，以及控制单元， 计算机和计算机的系统模式。 控制单元被配置为确定是否满足输入运动图像模式的条件，并且如果满足运动图像模式的条件，则将系统模式改变为运动图像模式。

公开(公告)号：US20130257520A1

公开(公告)日：2013-10-03

申请号：US13588795

申请日：2012-08-17

Applicant: Mun-Phil PARK ,  Jung-Hwan LEE

Inventor： Mun-Phil PARK ,  Jung-Hwan LEE

IPC: G11C17/14

CPC classification number: G11C11/4074 ,  G11C17/16 ,  G11C17/18

Abstract: A semiconductor device includes: a first driving voltage generation unit configured to generate a first driving voltage; a fuse unit coupled between an output node for receiving the first driving voltage and a fuse state sensing node; a driving unit configured to drive the fuse state sensing node with a second driving voltage in response to a control signal; a voltage level control unit configured to generate a voltage level control signal in response to a fuse state sensing signal that corresponds to a voltage level of the fuse state sensing node; and a second driving voltage generation unit configured to control and output a voltage level of the second driving voltage in response to the voltage level control signal. The semiconductor device repeatedly performs a rupture operation by monitoring a fuse state sensing signal.

Abstract translation: 半导体器件包括：第一驱动电压生成单元，被配置为产生第一驱动电压; 熔丝单元，其耦合在用于接收第一驱动电压的输出节点和熔丝状态感测节点之间; 驱动单元，被配置为响应于控制信号以第二驱动电压驱动所述熔丝状态感测节点; 电压电平控制单元，被配置为响应于对应于熔丝状态感测节点的电压电平的熔丝状态感测信号而产生电压电平控制信号; 以及第二驱动电压生成单元，被配置为响应于电压电平控制信号来控制和输出第二驱动电压的电压电平。 半导体器件通过监视熔丝状态感测信号来重复进行断裂操作。

公开(公告)号：US20110292744A1

公开(公告)日：2011-12-01

申请号：US12975981

申请日：2010-12-22

Applicant: Jung-Hwan LEE

Inventor： Jung-Hwan LEE

IPC: G11C7/10

CPC classification number: G11C7/1042 ,  G11C16/10 ,  G11C16/26 ,  G11C16/32

Abstract: A non-volatile memory device includes a plurality of input pads, a buffer configured to buffer data inputted through the plurality of the input pads in synchronization with a write enable signal, an even latch configured to store a first buffered data outputted from the buffer in response to an even write enable signal, an odd latch configured to store a second buffered data outputted from the buffer in response to an odd write enable signal, and a transfer unit configured to transfer stored data in the even latch and the odd latch to a selected bank of a plane in response to a bank selection signal.

Abstract translation: 非易失性存储器件包括多个输入焊盘，缓冲器被配置为与写使能信​​号同步地缓冲通过多个输入焊盘输入的数据;偶数锁存器，被配置为存储从缓冲器输出的第一缓冲数据 响应于偶写入使能信号，奇数锁存器被配置为存储响应于奇数写使能信号从缓冲器输出的第二缓冲数据;以及传送单元，被配置为将偶锁存器和奇锁存器中的存储数据传送到 响应于银行选择信号选择一个平面的银行。

公开(公告)号：US20170092657A1

公开(公告)日：2017-03-30

申请号：US15375387

申请日：2016-12-12

Applicant: Jung-Hwan LEE ,  Jee-Yong KIM ,  Dae-Seok BYEON

Inventor： Jung-Hwan LEE ,  Jee-Yong KIM ,  Dae-Seok BYEON

IPC: H01L27/11582 ,  H01L29/423 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L27/11582 ,  H01L21/28282 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/42352 ,  H01L29/66833

Abstract: Semiconductor devices are provided. A semiconductor device includes a stack of alternating insulation layers and gate electrodes. The semiconductor device includes a channel material in a channel recess in the stack. The semiconductor device includes a charge storage structure on the channel material, in the channel recess. Moreover, the semiconductor device includes a gate insulation layer on the channel material. The gate insulation layer undercuts a portion of the channel material. Related methods of forming semiconductor devices are also provided.

公开(公告)号：US20170062330A1

公开(公告)日：2017-03-02

申请号：US15201994

申请日：2016-07-05

Applicant: Jeeyong KIM ,  Daeseok BYEON ,  Jung-Hwan LEE ,  Sanghoon AHN

Inventor： Jeeyong KIM ,  Daeseok BYEON ,  Jung-Hwan LEE ,  Sanghoon AHN

IPC: H01L23/522 ,  H01L23/528 ,  H01L27/115

CPC classification number: H01L23/5226 ,  H01L21/7682 ,  H01L23/528 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L2221/1047

Abstract: Three-dimensional (3D) semiconductor memory devices capable of improving reliability may be provided. For example, a three dimensional (3D) memory device, in which a plurality of memory cell strings are vertically arranged, may include a substrate, a stack structure of alternating a plurality of interlayer dielectric (ILD) layers and a plurality of gate electrodes, at least one of the ILD layers including pores, a vertical structure penetrating the stack structure and electrically connected to the substrate, and a data storage layer between the stack structure and the vertical structure.

Abstract translation: 可以提供能够提高可靠性的三维（3D）半导体存储器件。 例如，其中垂直排列有多个存储单元串的三维（3D）存储器件可以包括衬底，交替多个层间电介质层（ILD）层和多个栅电极的堆叠结构， ILD层中的至少一个包括孔，穿过堆叠结构并电连接到衬底的垂直结构，以及堆叠结构和垂直结构之间的数据存储层。

公开(公告)号：US20120074484A1

公开(公告)日：2012-03-29

申请号：US13223698

申请日：2011-09-01

Applicant: Jin-Kyu KANG ,  Woon-Kyung LEE ,  Jee-Yong KIM ,  Jung-Hwan LEE

Inventor： Jin-Kyu KANG ,  Woon-Kyung LEE ,  Jee-Yong KIM ,  Jung-Hwan LEE

IPC: H01L21/336 ,  H01L29/788

CPC classification number: H01L21/764 ,  H01L21/7682 ,  H01L27/11524 ,  H01L27/11526

Abstract: A method of manufacturing a semiconductor device including forming a plurality of gate structures spaced apart from each other on a substrate; forming a first insulation layer covering the gate structures, the first insulation layer including a void between the gate structures; removing an upper portion of the first insulation layer to form a first insulation layer pattern on sidewalls of lower portions of the gate structures and on the substrate between the gate structures, the first insulation layer pattern including a first recess thereon; forming a conductive layer on upper portions of the gate structures exposed by the first insulation layer pattern; reacting the conductive layer with the gate structures; and forming a second insulation layer on the upper portions of the gate structures, the second insulation layer including a second recess therebeneath in fluid communication with the first recess.

Abstract translation: 一种制造半导体器件的方法，包括在衬底上形成彼此间隔开的多个栅极结构; 形成覆盖所述栅极结构的第一绝缘层，所述第一绝缘层包括所述栅极结构之间的空隙; 去除所述第一绝缘层的上部以在所述栅极结构的下部的侧壁和所述栅极结构之间的所述衬底上形成第一绝缘层图案，所述第一绝缘层图案包括其上的第一凹部; 在由第一绝缘层图案暴露的栅极结构的上部形成导电层; 使导电层与栅极结构反应; 以及在所述栅极结构的上部形成第二绝缘层，所述第二绝缘层包括与所述第一凹部流体连通的第二凹部。