Reduced voltage swing digital differential driver

    公开(公告)号:US06570415B2

    公开(公告)日:2003-05-27

    申请号:US10158659

    申请日:2002-05-30

    IPC分类号: H03B100

    摘要: A predriver for a differential pair having a reduce voltage swing is disclosed having fast switching speed and low power consumption. The predriver includes a p-type MOS transistor, and a first and second n-type MOS transistor. The source of the p-type MOS couples to the first power supply rail. The gate of the first n-type MOS transistor couples to the gate of the p-type MOS transistor to form an input. The drain of the first n-type MOS transistor couples to the drain of the p-type MOS transistor to form an output. The drain of the second n-type MOS transistor couples to the source of the first n-type MOS transistor. The source of the second n-type MOS transistor couples to ground. The gate of the second n-type MOS transistor couples to the output. The presence of the second n-type MOS transistor alters the voltage swing of the predriver to be from the threshold voltage level to the full power supply voltage, substantially reducing the current or power consumption.

    E-mail signature block segmentation
    122.
    发明授权
    E-mail signature block segmentation 有权
    电子邮件签名块分割

    公开(公告)号:US06360010B1

    公开(公告)日:2002-03-19

    申请号:US09132683

    申请日:1998-08-12

    IPC分类号: G06K934

    摘要: A technique for segmenting a loosely constrained text block, such as an e-mail signature block into sub-blocks by performing line segment extraction and connected component analysis on the foreground characters and background characters and recursively repeating connected component analysis on both the foreground and background characters and line segment extraction on the background characters until a text output includes no mixed reading blocks. A technique for correcting over segmentation errors in a line of text from a loosely constrained text block which has undergone geometrical analysis.

    摘要翻译: 一种用于通过对前景字符和背景字符进行线段提取和连接分量分析,将诸如电子邮件签名块的松散约束文本块分割成子块的技术,并在前景和背景上递归重复连接分量分析 字符和线段提取背景字符,直到文本输出不包含混合读取块。 一种用于从经过几何分析的松散约束的文本块中纠正文本行中的分段错误的技术。

    Method and kit for making a multidimensional combinatorial chemical library
    123.
    发明授权
    Method and kit for making a multidimensional combinatorial chemical library 失效
    制作多维组合化学文库的方法和试剂盒

    公开(公告)号:US06168912A

    公开(公告)日:2001-01-02

    申请号:US08590279

    申请日:1996-01-23

    申请人: Hao Chen

    发明人: Hao Chen

    IPC分类号: C12Q100

    摘要: Building blocks for making a combinatorial chemical library comprise &agr;-allyl carboxylic acids and their functionalized derivatives. These are covalently linked by monotonous or diverse linkages. These can be conformationally constrained by cyclization and annelation. Kits comprising diverse &agr;-allyl carboxylic acids can be used to make libraries.

    摘要翻译: 用于制备组合化学文库的构件包括α-烯丙基羧酸及其官能化衍生物。 这些是由单调或多样的联系共同联系在一起的。 这些可以由环化和延迟构象约束。 可以使用包含多种α-烯丙基羧酸的试剂盒来制备文库。

    Dynamic set/reset circuit with dual feedback
    124.
    发明授权
    Dynamic set/reset circuit with dual feedback 失效
    具有双反馈的动态设置/复位电路

    公开(公告)号:US6147534A

    公开(公告)日:2000-11-14

    申请号:US338809

    申请日:1999-06-23

    申请人: Song Kim Hao Chen

    发明人: Song Kim Hao Chen

    IPC分类号: H03K3/037

    CPC分类号: H03K3/0375

    摘要: A dynamic set/reset circuit is provided with a first feedback line and a second feedback line. The first feedback line provides an interlocked feedback signal which permits high frequency operation of the set/reset circuit. The second feedback line prevents the interlocked feedback signal from causing the circuit to improperly change state until the next cycle of the circuit. In this manner, the circuit will operate properly despite an unexpectedly wide pulse on an input line. The dual feedback can be used on the set or reset inputs of a set/reset circuit, or both, and the set/reset circuit can be used in various logic and high speed applications, such as within a microprocessor.

    摘要翻译: 动态设置/复位电路具有第一反馈线和第二反馈线。 第一反馈线提供互锁的反馈信号,允许设置/复位电路的高频操作。 第二反馈线防止互锁的反馈信号导致电路不正确地改变状态直到电路的下一个周期。 以这种方式,尽管在输入线上出现意外的宽脉冲,电路将正常工作。 双重反馈可用于设置/复位电路或两者的设置或复位输入,并且设置/复位电路可用于各种逻辑和高速应用,例如微处理器内。

    Dynamic set/reset circuit with dual feedback

    公开(公告)号:US5952859A

    公开(公告)日:1999-09-14

    申请号:US037251

    申请日:1998-03-09

    申请人: Song Kim Hao Chen

    发明人: Song Kim Hao Chen

    IPC分类号: H03K3/037 H03K19/00

    CPC分类号: H03K3/0375

    摘要: A dynamic set/reset circuit is provided with a first feedback line and a second feedback line. The first feedback line provides an interlocked feedback signal which permits high frequency operation of the set/reset circuit. The second feedback line prevents the interlocked feedback signal from causing the circuit to improperly change state until the next cycle of the circuit. In this manner, the circuit will operate properly despite an unexpectedly wide pulse on an input line. The dual feedback can be used on the set or reset inputs of a set/reset circuit, or both, and the set/reset circuit can be used in various logic and high speed applications, such as within a microprocessor.

    Electrical charger for telephones
    126.
    外观设计

    公开(公告)号:USD1019554S1

    公开(公告)日:2024-03-26

    申请号:US29903675

    申请日:2023-09-26

    申请人: Hao Chen

    设计人: Hao Chen

    摘要: FIG. 1 is a front, right and top perspective view of an electrical charger for telephones, showing my design.
    FIG. 2 is a rear, left and bottom perspective view thereof.
    FIG. 3 is a front elevation view thereof.
    FIG. 4 is a rear elevation view thereof.
    FIG. 5 is a left side elevation view thereof.
    FIG. 6 is a right side elevation view thereof.
    FIG. 7 is a top plan view thereof.
    FIG. 8 is a bottom plan view thereof; and,
    FIG. 9 is another front, right and top perspective view of the electrical charger for telephones in a disassembled state.
    The broken lines depict portions of the electrical charger for telephones that form no part of the claimed design.

    METHODS AND SYSTEMS FOR ADAPTIVE TUNING OF GAME EVENTS
    129.
    发明申请
    METHODS AND SYSTEMS FOR ADAPTIVE TUNING OF GAME EVENTS 审中-公开
    游戏活动自适应调谐的方法与系统

    公开(公告)号:US20150375120A1

    公开(公告)日:2015-12-31

    申请号:US14849354

    申请日:2015-09-09

    IPC分类号: A63F13/67

    摘要: A system, a machine-readable storage medium storing instructions, and a computer-implemented method are described herein for a System Tuner for defining an in-game event requiring accumulation of a pre-defined set of virtual objects in a virtual game (or online game) prior to termination of the in-game event. The System Tuner determines a head-start subset from the pre-defined set of virtual objects for a target player account based on a difference between a reference player skill level for the virtual game and a player skill level of the target player account. The System Tuner determines, based on the player skill level of the target player account and a pre-defined duration of the in-game event, a drop rate for virtual objects remaining in the pre-defined set of virtual objects. The System Tuner sends the head-start subset and the drop rate to a client device associated with the target player account.

    摘要翻译: 这里描述了一种系统,存储指令的机器可读存储介质和计算机实现的方法,用于系统调谐器,用于定义在虚拟游戏(或在线)中需要累积预定义的虚拟对象集合的游戏中事件 游戏)在游戏结束之前事件。 系统调谐器基于虚拟游戏的参考玩家技能水平和目标玩家账户的玩家技能水平之间的差异,来为目标玩家账户的预定义的虚拟对象集合确定头开始子集。 系统调谐器基于目标玩家帐户的玩家技能水平和游戏中事件的预定持续时间来确定保留在预定义的虚拟对象集合中的虚拟对象的丢弃率。 系统调谐器将起始子集和丢弃率发送到与目标玩家帐户相关联的客户端设备。

    Proportional memory operation throttling
    130.
    发明授权
    Proportional memory operation throttling 有权
    比例内存操作限制

    公开(公告)号:US09141568B2

    公开(公告)日:2015-09-22

    申请号:US13217513

    申请日:2011-08-25

    IPC分类号: G06F12/00 G06F13/16

    CPC分类号: G06F13/1642

    摘要: A memory controller receives memory operations via an interface which may include multiple ports. Each port is coupled to real-time or non-real-time requestors, and the received memory operations are classified as real-time or non-real-time and stored in queues prior to accessing memory. Within the memory controller, pending memory operations from the queues are scheduled for servicing. Logic throttles the scheduling of non-real-time memory operations in response to detecting a number of outstanding memory operations has exceeded a threshold. The throttling is proportional to the number of outstanding memory operations.

    摘要翻译: 存储器控制器经由可以包括多个端口的接口来接收存储器操作。 每个端口耦合到实时或非实时请求者,并且所接收的存储器操作被分类为实时或非实时的,并且在访问存储器之前存储在队列中。 在内存控制器中,排队等待的内存操作计划进行维修。 响应于检测到未完成的存储器操作的数量已经超过阈值,逻辑控制非实时存储器操作的调度。 节流与未完成记忆操作的数量成比例。