摘要:
A predriver for a differential pair having a reduce voltage swing is disclosed having fast switching speed and low power consumption. The predriver includes a p-type MOS transistor, and a first and second n-type MOS transistor. The source of the p-type MOS couples to the first power supply rail. The gate of the first n-type MOS transistor couples to the gate of the p-type MOS transistor to form an input. The drain of the first n-type MOS transistor couples to the drain of the p-type MOS transistor to form an output. The drain of the second n-type MOS transistor couples to the source of the first n-type MOS transistor. The source of the second n-type MOS transistor couples to ground. The gate of the second n-type MOS transistor couples to the output. The presence of the second n-type MOS transistor alters the voltage swing of the predriver to be from the threshold voltage level to the full power supply voltage, substantially reducing the current or power consumption.
摘要:
A technique for segmenting a loosely constrained text block, such as an e-mail signature block into sub-blocks by performing line segment extraction and connected component analysis on the foreground characters and background characters and recursively repeating connected component analysis on both the foreground and background characters and line segment extraction on the background characters until a text output includes no mixed reading blocks. A technique for correcting over segmentation errors in a line of text from a loosely constrained text block which has undergone geometrical analysis.
摘要:
Building blocks for making a combinatorial chemical library comprise &agr;-allyl carboxylic acids and their functionalized derivatives. These are covalently linked by monotonous or diverse linkages. These can be conformationally constrained by cyclization and annelation. Kits comprising diverse &agr;-allyl carboxylic acids can be used to make libraries.
摘要:
A dynamic set/reset circuit is provided with a first feedback line and a second feedback line. The first feedback line provides an interlocked feedback signal which permits high frequency operation of the set/reset circuit. The second feedback line prevents the interlocked feedback signal from causing the circuit to improperly change state until the next cycle of the circuit. In this manner, the circuit will operate properly despite an unexpectedly wide pulse on an input line. The dual feedback can be used on the set or reset inputs of a set/reset circuit, or both, and the set/reset circuit can be used in various logic and high speed applications, such as within a microprocessor.
摘要:
A dynamic set/reset circuit is provided with a first feedback line and a second feedback line. The first feedback line provides an interlocked feedback signal which permits high frequency operation of the set/reset circuit. The second feedback line prevents the interlocked feedback signal from causing the circuit to improperly change state until the next cycle of the circuit. In this manner, the circuit will operate properly despite an unexpectedly wide pulse on an input line. The dual feedback can be used on the set or reset inputs of a set/reset circuit, or both, and the set/reset circuit can be used in various logic and high speed applications, such as within a microprocessor.
摘要:
FIG. 1 is a front, right and top perspective view of an electrical charger for telephones, showing my design. FIG. 2 is a rear, left and bottom perspective view thereof. FIG. 3 is a front elevation view thereof. FIG. 4 is a rear elevation view thereof. FIG. 5 is a left side elevation view thereof. FIG. 6 is a right side elevation view thereof. FIG. 7 is a top plan view thereof. FIG. 8 is a bottom plan view thereof; and, FIG. 9 is another front, right and top perspective view of the electrical charger for telephones in a disassembled state. The broken lines depict portions of the electrical charger for telephones that form no part of the claimed design.
摘要:
A method of pressure forming a brown part from metal and/or ceramic particle feedstocks includes: introducing into a mold cavity or extruder a first feedstock and one or more additional feedstocks or a green or brown state insert made from a feedstock, wherein the different feedstocks correspond to the different portions of the part; pressurizing the mold cavity or extruder to produce a preform having a plurality of portions corresponding to the first and one or more additional feedstocks, and debinding the preform. Micro voids and interstitial paths from the interior of the preform part to the exterior allow the escape of decomposing or subliming backbone component substantially without creating macro voids due to internal pressure. The large brown preform may then be sintered and subsequently thermomechanically processed to produce a net wrought microstructure and properties that are substantially free the interstitial spaces.
摘要:
A system, a machine-readable storage medium storing instructions, and a computer-implemented method are described herein for a System Tuner for defining an in-game event requiring accumulation of a pre-defined set of virtual objects in a virtual game (or online game) prior to termination of the in-game event. The System Tuner determines a head-start subset from the pre-defined set of virtual objects for a target player account based on a difference between a reference player skill level for the virtual game and a player skill level of the target player account. The System Tuner determines, based on the player skill level of the target player account and a pre-defined duration of the in-game event, a drop rate for virtual objects remaining in the pre-defined set of virtual objects. The System Tuner sends the head-start subset and the drop rate to a client device associated with the target player account.
摘要:
A memory controller receives memory operations via an interface which may include multiple ports. Each port is coupled to real-time or non-real-time requestors, and the received memory operations are classified as real-time or non-real-time and stored in queues prior to accessing memory. Within the memory controller, pending memory operations from the queues are scheduled for servicing. Logic throttles the scheduling of non-real-time memory operations in response to detecting a number of outstanding memory operations has exceeded a threshold. The throttling is proportional to the number of outstanding memory operations.