Novel proteins and nucleic acids encoding same
    121.
    发明申请
    Novel proteins and nucleic acids encoding same 审中-公开
    新型蛋白质和编码相同的核酸

    公开(公告)号:US20060234255A1

    公开(公告)日:2006-10-19

    申请号:US11340031

    申请日:2006-01-26

    Abstract: The present invention provides novel isolated polynucleotides and small molecule target proteins encoded by the polynucleotides. Antibodies that immunospecifically bind to a novel small molecule target protein or any derivative, variant, mutant or fragment of that protein, polynucleotide or antibody are disclosed, as are methods in which the small molecule target protein, polynucleotide and antibody are utilized in the detection and treatment of a broad range of pathological states. More specifically, the present invention discloses methods of using recombinantly expressed and/or endogenously expressed proteins in various screening procedures for the purpose of identifying therapeutic antibodies and therapeutic small molecules associated with diseases. The invention further discloses therapeutic, diagnostic and research methods for diagnosis, treatment, and prevention of disorders involving any one of these novel human nucleic acids and proteins.

    Abstract translation: 本发明提供了由多核苷酸编码的新型分离的多核苷酸和小分子靶蛋白。 公开了免疫特异性结合该蛋白质,多核苷酸或抗体的新型小分子靶蛋白或任何衍生物,变体,突变体或片段的抗体,其中小分子靶蛋白,多核苷酸和抗体用于检测和 治疗广泛的病理状态。 更具体地,本发明公开了在各种筛选方法中使用重组表达和/或内源表达的蛋白质用于鉴定与疾病相关的治疗性抗体和治疗性小分子的方法。 本发明还公开了用于诊断,治疗和预防与这些新型人核酸和蛋白质中的任一种相关的病症的治疗,诊断和研究方法。

    Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry
    122.
    发明申请
    Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry 有权
    在集成电路的制造中形成沟槽隔离的方法和制造集成电路的方法

    公开(公告)号:US20060216906A1

    公开(公告)日:2006-09-28

    申请号:US11087218

    申请日:2005-03-23

    Abstract: A method of fabricating integrated circuitry includes depositing a spin-on-dielectric over a semiconductor substrate. The spin-on-dielectric comprises a polysilazane. Only some of the polysilazane is etched from the semiconductor substrate. Such etching comprises exposure to an etching fluid comprising at least one of a) an aqueous fluid having a pH greater than 7.0, or b) a basic fluid solution. After the etching, remaining spin-on-dielectric comprising polysilazane is annealed effective to form an annealed dielectric which is different in composition from the spin-on-dielectric, and preferably having a dielectric constant k which is different from that of the initially deposited spin-on-dielectric.

    Abstract translation: 制造集成电路的方法包括在半导体衬底上沉积旋涂电介质。 旋涂电介质包含聚硅氮烷。 仅从半导体衬底蚀刻一些聚硅氮烷。 这种蚀刻包括暴露于包括a)pH大于7.0的水性流体或b)碱性流体溶液中的至少一种的蚀刻流体。 在蚀刻之后,包含聚硅氮烷的剩余的旋涂电介质退火有效地形成退火电介质,其组成与旋涂电介质不同,并且优选具有与初始沉积的旋转不同的介电常数k - 电介质。

    Formation of micro lens by using flowable oxide deposition

    公开(公告)号:US20060198008A1

    公开(公告)日:2006-09-07

    申请号:US11072452

    申请日:2005-03-07

    Applicant: Jin Li Li Li

    Inventor: Jin Li Li Li

    CPC classification number: G02B3/0018 G02B3/0031

    Abstract: A method of forming a microlens employing relatively few processing steps and with a controlled microlens radii using a processes including a flowable oxide is disclosed. A lens form having recesses therein is produced and a flowable oxide material is deposited in recesses. Surface tension of the flowable oxide material within the form recesses creates spherical dips within the oxide material. The flowable oxide is then converted into silicon oxide by a heat process. A microlens material is deposited over the silicon oxide having spherical dips, and planarized to form a focus microlens array.

    Plasma etching methods and methods of forming memory devices comprising a chalcogenide comprising layer received operably proximate conductive electrodes
    125.
    发明授权
    Plasma etching methods and methods of forming memory devices comprising a chalcogenide comprising layer received operably proximate conductive electrodes 有权
    等离子体蚀刻方法和形成存储器件的方法,包括可靠地接近导电电极接收的含硫族化物的层

    公开(公告)号:US07094700B2

    公开(公告)日:2006-08-22

    申请号:US10932282

    申请日:2004-09-02

    CPC classification number: H01L45/143 H01L45/085 H01L45/1233 H01L45/1675

    Abstract: In one implementation, a plasma etching method comprises forming a GexSey chalcogenide comprising layer over a substrate. A mask comprising an organic masking material is formed over the GexSey chalcogenide comprising layer. The mask comprises a sidewall. At least prior to plasma etching the GexSey comprising layer, the sidewall of the mask is exposed to a fluorine comprising material. After said exposing, the GexSey chalcogenide comprising layer is plasma etched using the mask and a hydrogen containing etching gas. The plasma etching forms a substantially vertical sidewall of the GexSey chalcogenide comprising layer which is aligned with a lateral outermost extent of the sidewall of the mask.

    Abstract translation: 在一个实施方案中,等离子体蚀刻方法包括在衬底上形成包含Ge x Ga 2 O 3的硫属元素化层。 包含有机掩模材料的掩模形成在包含硫族元素的层上。 掩模包括侧壁。 至少在等离子体蚀刻包含Ge层之前,掩模的侧壁暴露于含氟材料。 在所述曝光之后,使用掩模和含氢蚀刻气体等离子体蚀刻含有硫族化合物的层。 等离子体蚀刻形成了与掩模的侧壁的最外侧横向对齐的包含Ge的硫属化合物层的基本上垂直的侧壁。

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