Semiconductor gas sensor, gas sensor system and method of gas analysis
    122.
    发明授权
    Semiconductor gas sensor, gas sensor system and method of gas analysis 失效
    半导体气体传感器,气体传感器系统及气体分析方法

    公开(公告)号:US06774613B1

    公开(公告)日:2004-08-10

    申请号:US09980122

    申请日:2002-04-05

    IPC分类号: G01N2700

    CPC分类号: G01N27/12 G01N33/0011

    摘要: A semiconducting gas sensor includes a gas-sensitive layer, a heater for heating the layer to a defined measuring temperature, and contact electrodes for measuring the electrical resistance of the gas-sensitive layer enclosed within a microchamber, in which the gas-sensitive layer is arranged. The chamber can be sealed from the outside, and is constructed so that the chamber volume is small enough to allow at least one component of the gas or gas mixture that is to be analyzed to be at least largely exhausted via conversion on the gas-sensitive layer, within a predetermined measuring interval. With the limited gas store and the conversion of a component of the gas during the measurement process, gases or gas mixtures comprising several components can be analyzed. In this, the measuring signal is reexamined following the conversion of at least one component. Within the chamber, several sensor elements may be arranged with gas-sensitive layers, and may be operated at different temperatures. One gas sensor system, for example, is comprised of at least two semiconducting gas sensors having microchambers, which are arranged within a system of gas lines and valves, and can be filled individually.

    摘要翻译: 半导体气体传感器包括气体敏感层,用于将层加热到限定的测量温度的加热器和用于测量封闭在微室内的气敏层的电阻的接触电极,其中气敏层是 安排。 室可以从外部密封,并且被构造成使得室容积足够小,以允许待分析的气体或气体混合物的至少一个组分通过气体敏感的转化至少大部分被排出 层,在预定的测量间隔内。 在测量过程中,气体储存有限和气体成分的转化,可以分析包含若干组分的气体或气体混合物。 在此,在至少一个组件的转换之后重新检查测量信号。 在室内,几个传感器元件可以布置有气体敏感层,并且可以在不同的温度下操作。 例如,一个气体传感器系统由具有微室的至少两个半导体气体传感器组成,其布置在气体管线和阀的系统内,并且可以单独填充。

    Error detection and correction method and apparatus in a magnetoresistive random access memory
    123.
    发明授权
    Error detection and correction method and apparatus in a magnetoresistive random access memory 有权
    磁阻随机存取存储器中的误差检测和校正方法及装置

    公开(公告)号:US06704230B1

    公开(公告)日:2004-03-09

    申请号:US10250201

    申请日:2003-06-12

    IPC分类号: G11C2900

    摘要: The present invention relates to a method and apparatus for reducing data errors in a magneto-resistive random access memory (MRAM). According to the disclosed method, data bits and associated error correction code (ECC) check bits are stored into a storage area. Thereafter, the data bits and ECC check bits are read out and any errors are detected and corrected. A data refresh is then initiated based on a count and data bits and associated ECC check bits stored in the storage area are then refreshed by accessing the stored data bits and the associated ECC check bits, and ultimately by checking, correcting and restoring the data bits and the ECC check bits to the storage area.

    摘要翻译: 本发明涉及一种用于减少磁阻随机存取存储器(MRAM)中的数据错误的方法和装置。 根据所公开的方法,将数据位和相关联的纠错码(ECC)校验位存储到存储区域中。 此后,读出数据位和ECC校验位,并检测和校正任何错误。 然后基于计数开始数据刷新,然后通过访问存储的数据位和相关联的ECC校验位来刷新存储在存储区域中的相关ECC校验位,并且最终通过检查,校正和恢复数据位 并将ECC校验位存储到存储区域。

    Low voltage shifter with latching function
    124.
    发明授权
    Low voltage shifter with latching function 失效
    具有锁定功能的低电压转换器

    公开(公告)号:US06683486B2

    公开(公告)日:2004-01-27

    申请号:US10114221

    申请日:2002-04-02

    IPC分类号: H03L500

    CPC分类号: H03K3/356147 H03K3/012

    摘要: A low voltage level shifter circuit with an embedded latch, implemented on a signal line having thereon low voltage signals. There is included a low voltage level shifter circuit configured to receive a low voltage input signal from a first portion of the signal line and output a higher voltage output signal on a second portion of the signal line. A latching circuit is also included, and is configured to latch the low voltage input signal from the first portion of the signal line.

    摘要翻译: 具有嵌入式锁存器的低电压电平移位器电路,其在具有低电压信号的信号线上实现。 包括低电压电平移位器电路,其配置为从信号线的第一部分接收低电压输入信号,并在信号线的第二部分上输出更高电压的输出信号。 还包括锁存电路,并且被配置为锁存来自信号线的第一部分的低电压输入信号。

    Multi-level signal lines with vertical twists
    125.
    发明授权
    Multi-level signal lines with vertical twists 有权
    多级信号线垂直扭曲

    公开(公告)号:US06430076B1

    公开(公告)日:2002-08-06

    申请号:US09964209

    申请日:2001-09-26

    IPC分类号: G11C502

    摘要: A multi-level signal line architecture having signal line pairs employing vertical twists to reduce couplings noise is disclosed. The signal line pairs are provided with open regions to accommodate offsets of twists of adjacent signal line pairs, thus reducing the line pitch of the signal lines. The open region is formed by removing a portion of the signal line in the upper level and locating that portion on another level above the upper level.

    摘要翻译: 公开了一种具有使用垂直扭曲的信号线对以减少耦合噪声的多电平信号线架构。 信号线对设置有开放区域以适应相邻信号线对的扭曲偏移,从而减小信号线的线间距。 通过去除上层的信号线的一部分并将该部分定位在上层上方的另一层上而形成开放区域。

    Buffers with reduced voltage input/output signals
    126.
    发明授权
    Buffers with reduced voltage input/output signals 有权
    具有降低电压输入/输出信号的缓冲器

    公开(公告)号:US06426658B1

    公开(公告)日:2002-07-30

    申请号:US09676864

    申请日:2000-09-29

    IPC分类号: H03K190185

    CPC分类号: H03K19/018521

    摘要: A buffer circuit that operates with reduced voltage input and output signals receives an input signal having reduced voltage range and generates an output signal with the reduced voltage range. The reduced voltage range is from 0 volts to VRED, where VRED is less than VCC, the voltage used to operate most of the logic in the integrated circuit. The use of a buffer circuit that receives and generates signals with a reduced voltage range advantageously reduces power consumption.

    摘要翻译: 以降低的电压输入和输出信号工作的缓冲电路接收具有降低的电压范围的输入信号并产生具有降低的电压范围的输出信号。 降低的电压范围是从0伏到VRED,其中VRED小于VCC,用于操作集成电路中大部分逻辑的电压。 使用接收和产生具有降低的电压范围的信号的缓冲电路有利地降低功耗。

    Sense amplifier
    127.
    发明授权
    Sense amplifier 有权
    感应放大器

    公开(公告)号:US06420908B2

    公开(公告)日:2002-07-16

    申请号:US09225665

    申请日:1999-01-05

    IPC分类号: G01R1900

    摘要: Providing an active signal that increases the gate overdrive voltage of the driver of a sense amplifier enables the use of smaller drivers. This facilitates more efficient layouts and/or smaller sense amplifiers, thereby reducing the chip size.

    摘要翻译: 提供增加读出放大器的驱动器的栅极过驱动电压的有源信号使得能够使用较小的驱动器。 这有助于更有效的布局和/或更小的感测放大器,从而减小芯片尺寸。

    Laser-supported process for cleaning a surface
    128.
    发明授权
    Laser-supported process for cleaning a surface 失效
    用于清洁表面的激光支持工艺

    公开(公告)号:US06419996B2

    公开(公告)日:2002-07-16

    申请号:US09189939

    申请日:1998-11-12

    IPC分类号: B05D300

    CPC分类号: B23K26/18 B23K26/146

    摘要: A process to remove a surface layer from a substrate by irradiating laser radiation, wherein the surface is scanned sequentially with the laser radiation being concentrated to a focus, before irradiating a predetermined surface element a thin fluid film or a fluid droplet cover is applied which covers at least that surface element, and the laser beam influences the surface element only for a very short treatment interval, especially less then 10 ms. By appropriate choice of the process parameters power density, treatment interval length, thickness of the fluid film, surface adhesion of the fluid, absorption characteristics of the fluid for the effective laser wavelength, and absorption characteristics of the fluid vapor an explosive evaporation of the fluid film is effected which results in a flaking of the surface and an evaporation of loose residues of the surface layer.

    摘要翻译: 通过照射激光辐射从衬底去除表面层的方法,其中在照射预定表面元件之前,将激光辐射依次扫描,激光辐射被浓缩到焦点,涂覆薄的流体膜或液滴盖,其覆盖 至少该表面元件和激光束只对非常短的处理间隔影响表面元件,特别是小于10ms。 通过适当选择工艺参数功率密度,处理间隔长度,流体膜的厚度,流体的表面粘附性,流体对吸收特性的有效激光波长和吸收特性的流体蒸气的爆发性蒸发的流体 影响了表面的剥落和表面层的松散残留物的蒸发。

    Semiconductor memory having asymmetric column addressing and twisted read write drive (RWD) line architecture
    129.
    发明授权
    Semiconductor memory having asymmetric column addressing and twisted read write drive (RWD) line architecture 失效
    具有非对称列寻址和双绞读写驱动(RWD)线架构的半导体存储器

    公开(公告)号:US06370055B1

    公开(公告)日:2002-04-09

    申请号:US09795761

    申请日:2001-02-28

    IPC分类号: G11C506

    CPC分类号: G11C5/063

    摘要: There is provided a semiconductor memory having a plurality of memory units. The memory includes a plurality of read write drive (RWD) lines horizontally and/or vertically twisted such that the RWD lines are shared between the plurality of memory units. A plurality of columns is included in each of the plurality of memory units. Each of the plurality of columns is adapted to access the plurality of RWD lines through asymmetrical addressing.

    摘要翻译: 提供了具有多个存储单元的半导体存储器。 存储器包括水平和/或垂直扭转的多个读写驱动(RWD)线,使得RWD线在多个存储器单元之间共享。 在多个存储单元的每一个中包括多个列。 多个列中的每一个适于通过非对称寻址来访问多个RWD线。

    Mixed swing voltage repeaters for high resistance or high capacitance signal lines and methods therefor
    130.
    发明授权
    Mixed swing voltage repeaters for high resistance or high capacitance signal lines and methods therefor 有权
    用于高电阻或高电容信号线的混合摆幅电压中继器及其方法

    公开(公告)号:US06359471B1

    公开(公告)日:2002-03-19

    申请号:US09491645

    申请日:2000-01-27

    IPC分类号: H03K190175

    摘要: A mixed swing voltage repeater circuit operates with reduced voltage signals, that is signals having a voltage level that is below a full swing voltage level. The mixed swing voltage repeater circuit is configured to be coupled to the signal line and has an input node coupled to a first portion of the signal line for receiving a reduced voltage signal and an output node coupled to a second portion of the signal line for outputting a full swing voltage signal. In another embodiment, the mixed swing voltage repeater circuit is configured to be coupled to the signal line and has an input node coupled to a first portion of the signal line for receiving a full swing voltage signal and an output node coupled to a second portion of the signal line for outputting a reduced swing voltage signal.

    摘要翻译: 混合摆幅电压中继器电路以降低的电压信号进行操作,即具有低于全摆幅电压电平的电压电平的信号。 混合摆幅电压中继器电路被配置为耦合到信号线,并且具有耦合到信号线的第一部分的输入节点,用于接收降低的电压信号,以及耦合到信号线的第二部分的输出节点用于输出 全摆幅电压信号。 在另一个实施例中,混合摆动电压中继器电路被配置为耦合到信号线,并且具有耦合到信号线的第一部分的输入节点,用于接收全摆幅电压信号,以及耦合到第二部分的输出节点 用于输出降低的摆动电压信号的信号线。