公开(公告)号：US20140374908A1

公开(公告)日：2014-12-25

申请号：US14306862

申请日：2014-06-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami JINTYOU ,  Yukinori SHIMA ,  Takahiro IGUCHI

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L21/76829 ,  G02F1/133345 ,  G02F1/136204 ,  G02F2001/136295 ,  G02F2201/50 ,  H01L21/7685 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L27/1225 ,  H01L27/1262 ,  H01L27/3272 ,  H01L29/458 ,  H01L29/786 ,  H01L29/7869 ,  H01L51/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: To improve the reliability of a semiconductor device including a low-resistance material such as copper, aluminum, gold, or silver as a wiring. Provided is a semiconductor device including a pair of electrodes electrically connected to a semiconductor layer which has a stacked-layer structure including a first protective layer in contact with the semiconductor layer and a conductive layer containing the low-resistance material and being over and in contact with the first protective layer. The top surface of the conductive layer is covered with a second protective layer functioning as a mask for processing the conductive layer. The side surface of the conductive layer is covered with a third protective layer. With this structure, entry or diffusion of the constituent element of the pair of conductive layers containing the low-resistance material into the semiconductor layer is suppressed.

Abstract translation: 为了提高包括诸如铜，铝，金或银的低电阻材料的半导体器件作为布线的可靠性。 提供一种半导体器件，其包括电连接到半导体层的一对电极，所述半导体层具有层叠结构，所述层叠结构包括与半导体层接触的第一保护层和包含低电阻材料的导电层并且接触 与第一保护层。 导电层的顶表面覆盖有用作处理导电层的掩模的第二保护层。 导电层的侧表面被第三保护层覆盖。 通过这种结构，抑制了含有低电阻材料的一对导电层的构成元素进入或扩散到半导体层中。

公开(公告)号：US20140147969A1

公开(公告)日：2014-05-29

申请号：US14169837

申请日：2014-01-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami JINTYOU ,  Yamato AIHARA ,  Katsuaki TOCHIBAYASHI ,  Toru ARAKAWA

IPC: H01L29/66

CPC classification number: H01L29/66969 ,  H01L21/0237 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/441 ,  H01L21/47573 ,  H01L29/045 ,  H01L29/24 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869

Abstract: An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high.

Abstract translation: 本发明的目的是提供一种制造包括高性能和高可靠性晶体管的半导体器件的技术。 在氧化物半导体层和导电层之间形成由导电层形成布线层时保护氧化物半导体层的保护导电膜，并且进行具有两个步骤的蚀刻工艺。 在第一蚀刻步骤中，在保护导电膜比导电层蚀刻少的条件下进行蚀刻，并且导电层对保护导电膜的蚀刻选择性高。 在第二蚀刻步骤中，在保护导电膜比氧化物半导体层更容易蚀刻的条件下进行蚀刻，并且保护性导电膜对氧化物半导体层的蚀刻选择性高。

公开(公告)号：US20250169109A1

公开(公告)日：2025-05-22

申请号：US19028799

申请日：2025-01-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Masami JINTYOU ,  Yukinori SHIMA

IPC: H10D30/67 ,  H10D86/40 ,  H10D86/60 ,  H10D99/00

Abstract: A highly reliable semiconductor device with favorable electrical characteristics is provided. A semiconductor device includes a semiconductor layer, an insulating layer, a metal oxide layer, and a conductive layer. The semiconductor layer, the insulating layer, the metal oxide layer, and the conductive layer are stacked in this order. The semiconductor layer includes a first region, a pair of second regions, and a pair of third regions. The first region overlaps the metal oxide layer. The second regions sandwich the first region, overlap the insulating layer, and do not overlap the metal oxide layer. The third regions sandwich the first region and the pair of second regions, and do not overlap the insulating layer. The third region includes a portion having a lower resistance than the first region. The second region includes a portion having a higher resistance than the third region.

公开(公告)号：US20250151538A1

公开(公告)日：2025-05-08

申请号：US18833581

申请日：2023-02-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu HOSAKA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Masataka NAKADA ,  Junichi KOEZUKA ,  Kenichi OKAZAKI

IPC: H10K59/124 ,  H10K59/12 ,  H10K59/121

Abstract: A semiconductor device including a miniaturized transistor is provided. The semiconductor device includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer. The first insulating layer has a first opening reaching the first conductive layer. The semiconductor layer is in contact with a top surface and a side surface of the first insulating layer and a top surface of the first conductive layer. The second conductive layer is provided over the semiconductor layer. The second conductive layer includes a second opening in a region overlapping with the first opening. The second insulating layer is provided over the semiconductor layer and the second conductive layer. The third conductive layer is provided over the second insulating layer. The first insulating layer has a stacked-layer structure of a third insulating layer and a fourth insulating layer over the third insulating layer. The fourth insulating layer includes a region having a film density higher than that of the third insulating layer.

公开(公告)号：US20240429170A1

公开(公告)日：2024-12-26

申请号：US18669136

申请日：2024-05-20

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Masami JINTYOU

IPC: H01L23/532 ,  H01L23/528 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device includes first to fourth conductive layers, first and second insulating layers, and a semiconductor layer. The first insulating layer is over the first conductive layer. The second conductive layer is over the first insulating layer. The second conductive layer and the first insulating layer include an opening reaching the first conductive layer. The semiconductor layer is in the opening. The second insulating layer is over the semiconductor layer. The third conductive layer is over the second insulating layer to fill the opening. The first insulating layer includes a depressed portion surrounding the opening in a plan view. The fourth conductive layer fills the depressed portion. Inside the opening, one side of the semiconductor layer faces the third conductive layer with the second insulating layer therebetween, and the other side of the semiconductor layer faces the fourth conductive layer with the first insulating layer therebetween.

公开(公告)号：US20240421208A1

公开(公告)日：2024-12-19

申请号：US18738930

申请日：2024-06-10

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Masami JINTYOU ,  Masayoshi DOBASHI ,  Junichi KOEZUKA

IPC: H01L29/49 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: A transistor that can be miniaturized and highly reliable is provided. A semiconductor device includes a transistor and a first insulating layer. The transistor includes first to third conductive layers, a semiconductor layer, and a second insulating layer. The first insulating layer includes a first layer and a second layer over the first layer. The first insulating layer is over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is over the second layer. The semiconductor layer is in contact with the first and second conductive layers and with a side surface of the first layer inside the first opening. The second insulating layer covers the semiconductor layer in the first opening, and the third conductive layer covers the second insulating layer in the first opening. The first insulating layer includes a second opening at a position different from the first opening. The second insulating layer is in contact with the first layer inside the second opening. The first layer includes an oxide insulating film, and the second layer includes an insulating film having an oxygen barrier property.

公开(公告)号：US20240379856A1

公开(公告)日：2024-11-14

申请号：US18664558

申请日：2024-05-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masami JINTYOU ,  Yasutaka NAKAZAWA ,  Yukinori SHIMA

IPC: H01L29/786 ,  H01L27/12

Abstract: The stability of steps of processing a wiring formed using copper or the like is increased. The concentration of impurities in a semiconductor film is reduced. Electrical characteristics of a semiconductor device are improved. A semiconductor device includes a semiconductor film, a pair of first protective films in contact with the semiconductor film, a pair of conductive films containing copper or the like in contact with the pair of first protective films, a pair of second protective films in contact with the pair of conductive films on the side opposite the pair of first protective films, a gate insulating film in contact with the semiconductor film, and a gate electrode overlapping with the semiconductor film with the gate insulating film therebetween. In a cross section, side surfaces of the pair of second protective films are located on the outer side of side surfaces of the pair of conductive films.

公开(公告)号：US20240266443A1

公开(公告)日：2024-08-08

申请号：US18612525

申请日：2024-03-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yasuharu HOSAKA ,  Yukinori SHIMA ,  Masataka NAKADA ,  Masami JINTYOU

IPC: H01L29/786 ,  G02F1/1368 ,  H01L21/426 ,  H01L27/12 ,  H01L29/04 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H10K50/115 ,  H10K59/12 ,  H10K59/40

CPC classification number: H01L29/7869 ,  H01L29/04 ,  H01L29/423 ,  H01L29/42384 ,  H01L29/49 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78648 ,  G02F1/1368 ,  H01L21/426 ,  H01L27/1225 ,  H10K50/115 ,  H10K59/12 ,  H10K59/40

Abstract: A semiconductor device that includes a transistor is provided. The transistor includes a first conductive film that functions as a first gate electrode, a first gate insulating film, a first oxide semiconductor film that includes a channel region, a second gate insulating film, and a second oxide semiconductor film and a second conductive film that function as a second gate electrode. The second oxide semiconductor film includes a region higher in carrier density than the first oxide semiconductor film. The second conductive film includes a region in contact with the first conductive film.

公开(公告)号：US20240234578A9

公开(公告)日：2024-07-11

申请号：US18378688

申请日：2023-10-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kenichi OKAZAKI ,  Masami JINTYOU ,  Kensuke YOSHIZUMI

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/265 ,  H01L21/266

CPC classification number: H01L29/7869 ,  H01L21/02274 ,  H01L21/2654 ,  H01L21/266

Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided.
The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The first insulating layer is provided over the semiconductor layer. The first conductive layer is provided over the first insulating layer. The semiconductor layer includes a first region that overlaps with the first conductive layer and the first insulating layer, a second region that does not overlap with the first conductive layer and overlaps with the first insulating layer, and a third region that overlaps with neither the first conductive layer nor the first insulating layer. The semiconductor layer contains a metal oxide. The second region and the third region contain a first element. The first element is one or more elements selected from boron, phosphorus, aluminum, and magnesium. The first element exists in a state of being bonded to oxygen.

公开(公告)号：US20230307547A1

公开(公告)日：2023-09-28

申请号：US18134185

申请日：2023-04-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696

Abstract: A semiconductor device with favorable electric characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, an oxide semiconductor layer, and first to third conductive layers. The oxide semiconductor layer includes a region in contact with the first insulating layer, the first conductive layer is connected to the oxide semiconductor layer, and the second conductive layer is connected to the oxide semiconductor layer. The second insulating layer includes a region in contact with the oxide semiconductor layer, and the third conductive layer includes a region in contact with the second insulating layer. The oxide semiconductor layer includes first to third regions. The first region and the second region are separated from each other, and the third region is located between the first region and the second region. The third region and the third conductive layer overlap with each other with the second insulating layer located therebetween. The first region and the second region include a region having a higher carbon concentration than the third region.