公开(公告)号：US20200058357A1

公开(公告)日：2020-02-20

申请号：US16550254

申请日：2019-08-25

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Thuan Vu ,  Stanley Hong ,  Anh Ly ,  Vipin Tiwari ,  Nhan Do

IPC: G11C16/04 ,  H01L29/788 ,  H01L27/11521 ,  G06N3/08

Abstract: Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network. Different calibration algorithms and systems are also disclosed. The system can modify a high voltage signal applied to an array of cells during a programming operation as the number of cells being programmed changes.

公开(公告)号：US20200058356A1

公开(公告)日：2020-02-20

申请号：US16550223

申请日：2019-08-24

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Thuan Vu ,  Stanley Hong ,  Anh Ly ,  Vipin Tiwari ,  Nhan Do

IPC: G11C16/04 ,  H01L29/788 ,  H01L27/11521 ,  G06N3/08

Abstract: Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network. Different calibration algorithms and systems are also disclosed. Optionally, the duration of a programming voltage can change as the number of cells to be programmed changes.

公开(公告)号：US10460810B2

公开(公告)日：2019-10-29

申请号：US15687191

申请日：2017-08-25

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen

IPC: G11C16/04 ,  G11C16/12 ,  G11C16/24 ,  G11C16/08 ,  G11C16/10 ,  G11C16/30

Abstract: An improved method and apparatus for programming advanced nanometer flash memory cells is disclosed.

公开(公告)号：US20190272876A1

公开(公告)日：2019-09-05

申请号：US16417518

申请日：2019-05-20

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Vipin Tiwari ,  Nhan Do

IPC: G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/34 ,  G11C16/32 ,  G11C16/28 ,  G11C16/14 ,  G11C16/04 ,  G11C16/26

Abstract: A non-volatile memory device is disclosed. The non-volatile memory device comprises an array of flash memory cells comprising a plurality of flash memory cells organized into rows and columns, wherein the array is further organized into a plurality of sectors, each sector comprising a plurality of rows of flash memory cells, and a row driver selectively coupled to a first row and a second row.

公开(公告)号：US20190080753A1

公开(公告)日：2019-03-14

申请号：US15701071

申请日：2017-09-11

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Stanley Hong ,  Feng Zhou ,  Xian Liu ,  Nhan Do

IPC: G11C13/00 ,  H01L45/00 ,  H01L27/24

Abstract: Various architectures and layouts for an array of resistive random access memory (RRAM) cells are disclosed. The RRAM cells are organized into rows and columns, with each cell comprising a top electrode, a bottom electrode, and a switching layer. Circuitry is included for improving the reading and writing of the array, including the addition of a plurality of columns of dummy RRAM cells in the array used as a ground source, connecting source lines to multiple pairs of rows of RRAM cells, and the addition of rows of isolation transistors.

公开(公告)号：US10141062B2

公开(公告)日：2018-11-27

申请号：US15135445

申请日：2016-04-21

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen ,  Viet Tan Nguyen

IPC: G11C11/34 ,  G11C7/02 ,  G11C16/30 ,  G11C16/08 ,  G11C16/10 ,  G11C16/28 ,  G11C8/10 ,  G11C5/14 ,  G11C16/32 ,  G11C29/14

Abstract: A circuit and method are disclosed for operating a non-volatile memory device, comprising time sampling a reference current or voltage in a floating holding node to obtain a hold voltage and applying the hold voltage in sensing circuitry.

公开(公告)号：US10134475B2

公开(公告)日：2018-11-20

申请号：US15048707

申请日：2016-02-19

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen

IPC: G11C16/24 ,  G11C16/14 ,  G11C16/12 ,  G11C16/04 ,  G11C16/26 ,  G11C16/10 ,  G11C16/34 ,  G11C16/16

Abstract: Various embodiments for inhibiting the programming of memory cells coupled to unselected bit lines while programming a memory cell coupled to a selected bit line in a flash memory array are disclosed. Various embodiments for compensating for leakage current during the programming of memory cells coupled to a selected bit line in a flash memory array also are disclosed.

公开(公告)号：US20180204627A1

公开(公告)日：2018-07-19

申请号：US15924100

申请日：2018-03-16

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu

IPC: G11C16/34 ,  G11C16/28 ,  G11C16/16 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10

Abstract: The present invention relates to a flash memory cell with only four terminals and decoder circuitry for operating an array of such flash memory cells. The invention allows for fewer terminals for each flash memory cell compared to the prior art, which results in a simplification of the decoder circuitry and overall die space required per flash memory cells. The invention also provides for the use of high voltages on one or more of the four terminals to allow for read, erase, and programming operations despite the lower number of terminals compared to prior art flash memory cells.

公开(公告)号：US09911501B2

公开(公告)日：2018-03-06

申请号：US15163548

申请日：2016-05-24

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu

IPC: G11C16/06 ,  G11C16/28 ,  G11C16/14 ,  G11C16/24

CPC classification number: G11C16/28 ,  G11C7/065 ,  G11C16/0433 ,  G11C16/14 ,  G11C16/24

Abstract: The present invention relates to an improved sensing amplifier and related method for use in read operations in flash memory devices. In one embodiment, the sensing amplifier includes a built-in voltage offset. In another embodiment, a voltage offset is induced in the sensing amplifier through the use of capacitors. In another embodiment, the sensing amplifier utilizes sloped timing for the reference signal to increase the margin by which a “0” or “1” are detected from the current drawn by the selected cell compared to the reference cell. In an another embodiment, a sensing amplifier is used without any voltage offset.

公开(公告)号：US09767911B2

公开(公告)日：2017-09-19

申请号：US14791213

申请日：2015-07-02

Applicant: Silicon Storage Technology, Inc.

Inventor： Hieu Van Tran ,  Anh Ly ,  Thuan Vu ,  Hung Quoc Nguyen

IPC: G11C16/12 ,  G11C16/24 ,  G11C16/08 ,  G11C16/10 ,  G11C16/30

CPC classification number: G11C16/12 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/30

Abstract: An improved method and apparatus for programming advanced nanometer flash memory cells is disclosed.