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公开(公告)号：US20030146799A1
公开(公告)日：2003-08-07
申请号：US10352031
申请日：2003-01-28
Applicant: NEC ELECTRONICS CORPORATION
Inventor： Yoshinori Muramatsu , Fuyuki Okamoto
IPC: H03B005/00
CPC classification number: H03B5/1212 , H03B5/124 , H03B5/1268 , H03B5/1293 , H03B2201/0208 , H03B2201/025
Abstract: At the same control voltage Vtune, the oscillation frequency with only switches SW3 and SW4 being closed is higher than that with only switches SW1 and SW2 being closed. Accordingly, even when the oscillation frequency is lower than designed with only the switches SW1 and SW2 being closed and the capacitance of varactor diodes D1 and D2 cannot be controlled to provide the desired oscillation frequency, the desired oscillation frequency can be provided by closing only the switches SW3 and SW4 to control the capacitance of the varactor diodes D1 and D2. On the oscillation frequency, a coarse tuning can be performed by controlling the switches SW1 to SW4, while a fine tuning can be performed with the varactor diodes D1 and D2. Consequently, the range of the oscillation frequency is increased.
Abstract translation: 在相同的控制电压Vtune下，只有开关SW3和SW4闭合的振荡频率高于只有开关SW1和SW2闭合的振荡频率。 因此，即使当振荡频率低于仅开关SW1和SW2闭合的设计，并且变容二极管D1和D2的电容不能被控制以提供期望的振荡频率时，可以通过仅关闭振荡频率来提供期望的振荡频率 开关SW3和SW4来控制变容二极管D1和D2的电容。 在振荡频率上，可以通过控制开关SW1〜SW4进行粗调，同时可以用变容二极管D1，D2进行微调。 因此，振荡频率的范围增加。
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公开(公告)号：US20030064700A1
公开(公告)日：2003-04-03
申请号：US10269123
申请日：2002-10-10
Applicant: BridgeWave Communications, Inc.
Inventor： Eliezer Pasternak
IPC: H04B001/26
CPC classification number: H04B1/18 , H03B2201/0208 , H03B2201/025
Abstract: A tunable element in the microwave frequency range is described that may include one or more tunable elements that are directly digitally controlled by a digital bus connecting a digital control circuit to each controlled element. In particular, each digital signal is filtered by a digital isolation technique so that the signal reaches the tunable elements with very low noise. The low noise digital signals are then converted to analog control voltages. The direct D/A conversion is accomplished by a special D/A converter which is manufactured as an integral part of a substrate. This D/A converter in accordance with the invention may consist of a resistor ladder or a directly digitally controlled capacitor. The direct digitally controlled capacitor may be a cantilevered type capacitor having multiple separate electrodes or sub-plates representing binary bits that may be used to control the capacitor. A low cost microwave oscillator is disclosed in which some of the filters and oscillators are direct digitally tuned elements.
Abstract translation: 描述了微波频率范围中的可调元件，其可以包括由数字总线直接数字控制的一个或多个可调元件，数字总线将数字控制电路连接到每个受控元件。 特别地，每个数字信号被数字隔离技术滤波，使得信号以非常低的噪声到达可调谐元件。 然后将低噪声数字信号转换为模拟控制电压。 直接D / A转换是通过专门的D / A转换器来实现的，该D / A转换器被制造为衬底的一个组成部分。 根据本发明的该D / A转换器可以由电阻梯或直接数字控制的电容器组成。 直接数控电容器可以是具有多个分开的电极或表示可用于控制电容器的二进制位的子板的悬臂式电容器。 公开了一种低成本的微波振荡器，其中一些滤波器和振荡器是直接的数字调谐元件。
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公开(公告)号：US20030054789A1
公开(公告)日：2003-03-20
申请号：US10269130
申请日：2002-10-10
Applicant: BridgeWave Communications, Inc.
Inventor： Eliezer Pasternak
IPC: H04B001/28
CPC classification number: H04B1/18 , H03B2201/0208 , H03B2201/025
Abstract: A tunable element in the microwave frequency range is described that may include one or more tunable elements that are directly digitally controlled by a digital bus connecting a digital control circuit to each controlled element. In particular, each digital signal is filtered by a digital isolation technique so that the signal reaches the tunable elements with very low noise. The low noise digital signals are then converted to analog control voltages. The direct D/A conversion is accomplished by a special D/A converter which is manufactured as an integral part of a substrate. This D/A converter in accordance with the invention may consist of a resistor ladder or a directly digitally controlled capacitor. The direct digitally controlled capacitor may be a cantilevered type capacitor having multiple separate electrodes or sub-plates representing binary bits that may be used to control the capacitor. A low cost microwave oscillator is disclosed in which some of the filters and oscillators are direct digitally tuned elements.
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公开(公告)号：US20030020544A1
公开(公告)日：2003-01-30
申请号：US10183552
申请日：2002-06-28
Applicant: Broadcom Corporation
Inventor： Arya R. Behzad
IPC: H03F003/45
CPC classification number: H03F1/3211 , H01F17/0006 , H01F17/0013 , H01F2017/0026 , H01F2017/0053 , H01F2021/125 , H01L23/5227 , H01L27/0248 , H01L27/08 , H01L2924/0002 , H01L2924/3011 , H03B5/364 , H03B2201/025 , H03B2201/0266 , H03D7/161 , H03D7/18 , H03G1/0029 , H03H11/1291 , H03J1/0075 , H03J3/04 , H03J3/08 , H03J3/185 , H03J2200/10 , H03L1/023 , H03L7/10 , H03L7/23 , H01L2924/00
Abstract: An integrated receiver with channel selection and image rejection is substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.
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公开(公告)号：US5936474A
公开(公告)日：1999-08-10
申请号：US973022
申请日：1997-11-26
Applicant: Samuel Rousselin
Inventor： Samuel Rousselin
CPC classification number: H03B5/04 , H03L7/099 , H03L7/10 , H03L7/183 , H03B2201/025 , H03J2200/10
Abstract: An electronic device is disclosed having an oscillation circuit included in a phase-locked loop. The phase-locked loop includes a phase detector and a variable divider having a selected dividing ratio. A control circuit is provided which melts a fuse as a function of the magnitude of the output of the phase detector for each dividing ratio of the divider, indicating a bad or good locking of the loop.
Abstract translation: PCT No.PCT / IB97 / 00318 Sec。 371日期：1997年11月26日 102（e）日期1997年11月26日PCT 1997年3月28日PCT公布。 出版物WO97 / 37432 PCT 日期：1997年10月9日公开了一种具有包括在锁相环中的振荡电路的电子设备。 锁相环包括相位检测器和具有选定分频比的可变分频器。 提供控制电路，其根据分频器的每个分频比，将熔丝熔化为相位检测器的输出的大小的函数，表示环路的不良或良好的锁定。
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Patent Agency Ranking
公开(公告)号：US20170244361A1
公开(公告)日：2017-08-24
申请号：US15048460
申请日：2016-02-19
Applicant: QUALCOMM Incorporated
Inventor： Mohammad FARAZIAN , Masoud MOSLEHI BAJESTAN
IPC: H03B5/12
CPC classification number: H03B5/1228 , H03B5/1212 , H03B5/1265 , H03B5/1268 , H03B5/1841 , H03B5/1852 , H03B2200/0016 , H03B2201/025
Abstract: Certain aspects of the present disclosure generally relate to a voltage-controlled oscillator (VCO) that is configurable (e.g., in a dynamic manner) in multiple modes of operation (e.g., low/high-band modes). The VCO may include a resonant circuit coupled to a plurality of switches that may be used to adjust current flow within one or more inductive elements of the resonant circuit. By adjusting the current flow within the inductive elements, an inductance of the resonant circuit may be adjusted, which in turn adjusts a band of the VCO.
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公开(公告)号：US20170141728A1
公开(公告)日：2017-05-18
申请号：US15292208
申请日：2016-10-13
Applicant: MEDIATEK Inc.
Inventor： Yen-Tso Chen
IPC: H03B5/12
CPC classification number: H03B5/1212 , H03B5/1215 , H03B5/1228 , H03B5/1268 , H03B5/1852 , H03B2200/0016 , H03B2201/025
Abstract: A signal generator and an associated resonator circuit are provided. The signal generator includes the resonator circuit and a core circuit. The resonator circuit further includes a first inductor (L1), a second inductor (L2), a plurality of capacitors and a switching circuit. The first inductor (L1) has a first terminal (N1) and a third terminal (N3), and the second inductor (L2) has a second terminal (N2) and a fourth terminal (N4). The switching circuit includes a first switch (S1), a second switch (S2), a third switch (S3) and a fourth switch (S4). The core circuit further includes a first inner circuit, a first outer circuit, a second inner circuit, and a second outer circuit. Configurations of these switches are adjustable and resonance caused between these terminals is changed accordingly.
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公开(公告)号：US20160336945A1
公开(公告)日：2016-11-17
申请号：US14709712
申请日：2015-05-12
Applicant: Intel Corporation
Inventor： Fang-Ren LIAO , Shih-An YU
IPC: H03L7/24
CPC classification number: H03L7/24 , H03B5/1265 , H03B2200/005 , H03B2201/011 , H03B2201/025 , H03L7/099
Abstract: A frequency calibration method for calibrating an output frequency of a voltage-controlled oscillator is provided. The voltage-controlled oscillator includes a first capacitor bank, a second capacitor bank, and a third capacitor bank. The first capacitor bank and the third capacitor bank are initially disabled and the second capacitor bank is initially enabled. The method includes, when the initial output frequency is lower than a reference frequency, adjusting the capacitance of the second capacitor bank until the calibrated output frequency is greater than the reference frequency, and when the initial output frequency is greater than the reference frequency, enabling the first capacitor bank and gradually increasing the capacitance of the first capacitor bank until the calibrated output frequency is lower than the reference frequency.
Abstract translation: 提供用于校准压控振荡器的输出频率的频率校准方法。 压控振荡器包括第一电容器组，第二电容器组和第三电容器组。 初始禁止第一电容器组和第三电容器组，并且初始使能第二电容器组。 该方法包括：当初始输出频率低于参考频率时，调整第二电容器组的电容，直到校准输出频率大于参考频率，并且当初始输出频率大于参考频率时，使能 第一电容器组并逐渐增加第一电容器组的电容，直到校准的输出频率低于参考频率。
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公开(公告)号：US09432034B2
公开(公告)日：2016-08-30
申请号：US14676585
申请日：2015-04-01
Applicant: NORDIC SEMICONDUCTOR ASA
Inventor： Ola Bruset , Tor Oyvind Vedal
Abstract: An integrated oscillator circuit comprises an oscillator configured to be switched between a first frequency and a second frequency. A switching circuit receives an input representing a target frequency and switches the oscillator between the first and second frequencies at intervals determined by the input, so as to cause the average output frequency of the oscillator to approximate the target frequency.
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公开(公告)号：US09337806B2
公开(公告)日：2016-05-10
申请号：US14728689
申请日：2015-06-02
Inventor： Chewn-Pu Jou , Ying-Ta Lu , Hsien-Yuan Liao
CPC classification number: H03J5/246 , H01G4/38 , H03B5/1215 , H03B5/1228 , H03B5/1265 , H03B2201/025 , H03H5/12 , H03H7/00 , H03J2200/10 , H03L7/08
Abstract: An electronic device includes an inductive element, and variable capacitors. Each variable capacitor includes: first and third capacitors, both having a first terminal electrically connected to a first terminal of the inductive element; and second and fourth capacitors, both having a first terminal electrically connected to a second terminal of the inductive element. A first switch circuit electrically connects or isolates a second terminal of the first capacitor to/from a second terminal of the second capacitor. A second switch circuit electrically connects or isolates a second terminal of the third capacitor to/from a second terminal of the fourth capacitor. A third switch circuit electrically connects or isolates the second terminal of the first capacitor to/from the second terminal of the fourth capacitor. A fourth switch circuit electrically connects or isolates the second terminal of the third capacitor to/from the second terminal of the second capacitor.
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