Network functions virtualization platforms with function chaining capabilities

    公开(公告)号:US11960921B2

    公开(公告)日:2024-04-16

    申请号:US18196270

    申请日:2023-05-11

    Abstract: A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.

    Display tracking systems and methods

    公开(公告)号:US11954885B2

    公开(公告)日:2024-04-09

    申请号:US17476312

    申请日:2021-09-15

    Applicant: Apple Inc.

    Abstract: A tracked device may be used in an extended reality system in coordination with a tracking device. The tracked device may be ordinarily difficult to track, for example due to changing appearances or relatively small surface areas of unchanging features, as may be the case with an electronic device with a relatively large display surrounded by a thin physical outer boundary. In these cases, the tracked device may periodically present an image to the tracking device that the tracking device stores as an indication to permit tracking of a known, unchanging feature despite the image not being presented continuously on the display of the tracked device. The image may include a static image, designated tracking data overlaid on an image frame otherwise scheduled for presentation, or extracted image features from the image frame otherwise scheduled for presentation. Additional power saving methods and known marker generation methods are also described.

    System and method for enclosing piston cooling gallery

    公开(公告)号:US11946434B1

    公开(公告)日:2024-04-02

    申请号:US18107463

    申请日:2023-02-08

    CPC classification number: F02F3/16 F01P3/06

    Abstract: A system includes a piston assembly. The piston assembly includes a crown portion having a crown, an outer wall coupled to the crown, a first inner wall disposed inside of the outer wall, a first fluid chamber disposed radially between the outer wall and the first inner wall, and an angled wall insert. An opening extends into the first fluid chamber in an axially inward direction. The outer wall, the first inner wall, the first fluid chamber, the opening, and the angled wall insert extend circumferentially about a central axis of the piston assembly. The angled wall insert is disposed in the opening, and the first fluid chamber is disposed axially between the crown and the angled wall insert.

    Systems and methods for self-directed investing

    公开(公告)号:US11941225B1

    公开(公告)日:2024-03-26

    申请号:US16152231

    申请日:2018-10-04

    CPC classification number: G06F3/0482 G06Q30/0625 G06Q30/0641 G06Q40/06

    Abstract: In one embodiment, a system includes a user interface generation system comprising one or more processors configured to generate a graphical user interface configured to be displayed via a display of a user computing device. The graphical user interface is configured to receive one or more inputs relating to a financial trade. The user interface generation system is also configured to transmit the graphical user interface to the user computing device. In addition, the graphical user interface includes executable code defining a plurality of components encapsulated within the graphical user interface. Each component includes one or more properties and one or more states. The one or more properties and the one or more states relate to the financial trade. The executable code of the graphical user interface is configured to receive the one or more inputs relating to the financial trade from the plurality of components, and to update and render the one or more properties and/or the one or more states of the plurality of components based at least in part on the one or more inputs.

    System and method for executing database operations based on a policy

    公开(公告)号:US11941004B1

    公开(公告)日:2024-03-26

    申请号:US17035036

    申请日:2020-09-28

    Inventor: Glen Alan Becker

    CPC classification number: G06F16/2455 G06F16/2228 G06F16/217

    Abstract: Disclosed are systems, devices, methods, and computer-readable media for performing various actions for bringing data stores into compliance with a policy. The actions include generating a global scan index (“scan index”) for SAS® software and using the scan index to handle data management operations. Unlike traditional B-tree indices that consume a larger quantity of resources to parse through data, the scan indices may include a table of three columns. A first column may include an indication of a search value, a second column may include an indication of what table(s) in the data store(s) include the requested value, and a third column may include an indication of the row number for the tables in column two in which the value resides. The actions further include batching requests to perform a data management operation on data of a certain category by employing the scan index.

    Systems and methods for address fault detection

    公开(公告)号:US11928021B2

    公开(公告)日:2024-03-12

    申请号:US17711002

    申请日:2022-03-31

    Inventor: Melissa I. Uribe

    CPC classification number: G06F11/1016 G06F11/1044

    Abstract: A memory device is provided. The memory device includes a memory bank configured to store data in one or more memory cells. The memory device further includes an address fault detection system designed to detect a mismatch between the address originally used to store the data and the address subsequently used to read the data. The address fault detection system generates an address parity bit from the received address and either stores that address parity bit with the user data or uses the address parity bit to invert the internal ECC bits generated from the user data. The address fault detection system can determine from the resulting syndrome from the ECC bits whether or not an address fault has occurred and raise an address fault indication flag if the address fault is detected.

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