公开(公告)号：US20150042227A1

公开(公告)日：2015-02-12

申请号：US14312919

申请日：2014-06-24

Applicant: Nitin Kumar ,  Markus Ziegler

Inventor： Nitin Kumar ,  Markus Ziegler

IPC: H05B33/08

CPC classification number: H05B33/0815 ,  H02M3/24 ,  H02M3/33507 ,  H02M2001/0025 ,  H05B33/08 ,  Y02B20/348

Abstract: A bi-level current configurable driver is provided. The driver includes a feedback circuit, a driver circuit providing a driver signal to a half bridge inverter, and a step-dim interface coupled to a first alternating current input line, a second alternating current input line, and a neutral line, providing voltage to the driver circuit. The driver also includes a first feedforward circuit coupled to the step-dim interface, where the first feedforward circuit receives a first signal from the step-dim interface based on the states of the first alternating current input line, the second alternating current input line, and the neutral line. In a first state, the driver provides full current to a load, and in a second state, the driver provides less than full current to the load.

Abstract translation: 提供双电平电流可配置驱动器。 驱动器包括反馈电路，向半桥逆变器提供驱动器信号的驱动器电路，以及耦合到第一交流输入线，第二交流输入线和中性线的阶梯形接口，提供电压到 驱动电路。 所述驱动器还包括耦合到所述渐变接口的第一前馈电路，其中所述第一前馈电路基于所述第一交流电输入线，所述第二交流输入线，所述第二交流输入线， 和中性线。 在第一状态下，驱动器向负载提供全电流，而在第二状态下，驱动器向负载提供小于满电流。

公开(公告)号：US08953599B1

公开(公告)日：2015-02-10

申请号：US13539120

申请日：2012-06-29

Applicant: Colby Barth ,  Nischal Sheth ,  Nitin Kumar ,  Xuefei Zhang ,  Panning Huang ,  Raghavendra Mallya ,  Bhasker R. Allam ,  Krishna Narayanaswamy ,  Dongyi Jiang ,  Tsai-Zong Lin ,  Jiaxiang Su

Inventor： Colby Barth ,  Nischal Sheth ,  Nitin Kumar ,  Xuefei Zhang ,  Panning Huang ,  Raghavendra Mallya ,  Bhasker R. Allam ,  Krishna Narayanaswamy ,  Dongyi Jiang ,  Tsai-Zong Lin ,  Jiaxiang Su

IPC: H04L12/28 ,  H04L12/751

CPC classification number: H04L45/02 ,  H04L45/40 ,  H04L45/586 ,  H04L45/60

Abstract: In general, techniques are for providing a direct forwarding path between virtual routers within a single virtualized routing system. In one example, a method includes combining forwarding information from a plurality of virtual routers into collapsed forwarding information that comprises one or more direct forwarding paths between the respective virtual routers. The method also includes determining a direct forwarding path to an egress interface of the second virtual router, in response to receiving a network packet at an ingress interface of a first virtual router. The method also includes forwarding the network packet from the ingress interface of the first virtual router to the egress interface of the second virtual router using the direct forwarding path, wherein the network packet traverses a switch fabric directly from the ingress interface of the first virtual router to the egress interface of the second virtual router.

Abstract translation: 通常，技术用于在单个虚拟化路由系统内的虚拟路由器之间提供直接转发路径。 在一个示例中，一种方法包括将来自多个虚拟路由器的转发信息组合成包括在各个虚拟路由器之间的一个或多个直接转发路径的折叠转发信息。 响应于在第一虚拟路由器的入口接口处接收到网络分组，该方法还包括确定到第二虚拟路由器的出口接口的直接转发路径。 该方法还包括使用直接转发路径将网络分组从第一虚拟路由器的入口接口转发到第二虚拟路由器的出口接口，其中网络分组从第一虚拟路由器的入口接口直接穿越交换结构 到第二虚拟路由器的出口接口。

公开(公告)号：US08937437B2

公开(公告)日：2015-01-20

申请号：US13917414

申请日：2013-06-13

Applicant: Nitin Kumar ,  Shashank Bakre

Inventor： Nitin Kumar ,  Shashank Bakre

IPC: H05B41/36 ,  H05B37/02

CPC classification number: H05B41/2988

Abstract: A ballast comprises an inverter circuit for providing an oscillating current signal for energizing the at least one lamp. The inverter circuit comprises a first switching component and a second switching component each having a collector terminal, a base terminal, and an emitter terminal. And, each switching component is configured for alternately operating between a conductive state and a non-conductive state. A first collector-emitter circuit is connected between the collector terminal and the emitter terminal of the first switching component, wherein the first collector-emitter circuit has a first resistance of zero or more Ohms. A second collector-emitter circuit is connected between the collector terminal and the emitter terminal of the second switching component, wherein the second collector-emitter circuit has a second resistance of zero or more Ohms and the first resistance and the second resistance are unequal.

Abstract translation: 镇流器包括用于提供用于激励至少一个灯的振荡电流信号的逆变器电路。 逆变器电路包括具有集电极端子，基极端子和发射极端子的第一开关部件和第二开关部件。 并且，每个开关部件被配置为在导通状态和非导通状态之间交替地操作。 第一集电极 - 发射极电路连接在第一开关部件的集电极端子和发射极端子之间，其中第一集电极 - 发射极电路具有零个或更多欧姆的第一电阻。 第二集电极 - 发射极电路连接在第二开关部件的集电极端子和发射极端子之间，其中第二集电极 - 发射极电路具有零欧姆以上的第二电阻，第一电阻和第二电阻不相等。

公开(公告)号：US08890594B1

公开(公告)日：2014-11-18

申请号：US13938244

申请日：2013-07-10

Applicant: Surendra Kumar Tadi ,  Nitin Kumar Jaiswal

Inventor： Surendra Kumar Tadi ,  Nitin Kumar Jaiswal

IPC: H03K3/36 ,  H03K3/037

CPC classification number: H03K3/0375

Abstract: A system for synchronizing a functional reset between first and second clock domains that operate on first and second clock signals, respectively. The system includes first, second and third synchronizer flip-flops that operate on the second clock signal. The first synchronizer flip-flop receives a functional reset signal generated by the first clock domain at its reset terminal and generates a low output signal. The low output signal causes the second synchronizer flip-flop and subsequently the third synchronizer flip-flop to generate low output signals at positive edges of the second clock signal. The low output signal generated by the third synchronizer flip-flop is used to reset the second clock domain.

Abstract translation: 一种用于在第一和第二时钟域之间分别对第一和第二时钟信号进行功能复位同步的系统。 该系统包括在第二时钟信号上工作的第一，第二和第三同步器触发器。 第一同步触发器在其复位端接收由第一时钟域产生的功能复位信号，并产生低输出信号。 低输出信号引起第二同步触发器，随后第三同步触发器在第二时钟信号的正边沿产生低输出信号。 由第三同步触发器产生的低输出信号用于复位第二时钟域。

公开(公告)号：US08837479B1

公开(公告)日：2014-09-16

申请号：US13533967

申请日：2012-06-27

Applicant: Nitin Kumar ,  Nischal Sheth ,  Satish Ramachandran ,  Robert Kebler ,  Maciek Konstantynowicz

Inventor： Nitin Kumar ,  Nischal Sheth ,  Satish Ramachandran ,  Robert Kebler ,  Maciek Konstantynowicz

IPC: H04L12/24 ,  H04L12/28

CPC classification number: H04L45/28 ,  H04L12/1877 ,  H04L45/24

Abstract: A packet-forwarding integrated circuit includes a control logic module and a selector block configured to produce a value indicating an incoming interface associated with a multicast data stream that meets stream health requirements, wherein the multicast data stream is one of a plurality of redundant multicast data streams each received on different incoming interfaces, wherein based on the value produced by the selector block the control logic module outputs data packets of the multicast data stream that meets stream health requirements received on the incoming interface, and discards data packets of other multicast data streams received on other incoming interfaces not indicated by the selector block. In response to detecting that a quality of one of the redundant multicast data streams has fallen below a configured threshold, the control logic automatically rewrites the selector block to forward a different one of the redundant multicast data streams.

Abstract translation: 分组转发集成电路包括控制逻辑模块和选择器块，其被配置为产生指示与满足流健康要求的多播数据流相关联的输入接口的值，其中多播数据流是多个冗余多播数据之一 每个在不同输入接口上接收的流，其中，基于由选择器块产生的值，控制逻辑模块输出满足在入接口上接收的流健康要求的多播数据流的数据分组，并丢弃其他多播数据流的数据分组 在未由选择器块指示的其他输入接口上接收。 响应于检测到冗余多播数据流中的一个的质量已经低于配置的阈值，则控制逻辑自动重写该选择器块以转发不同的冗余多播数据流。

公开(公告)号：US08836240B2

公开(公告)日：2014-09-16

申请号：US13539402

申请日：2012-06-30

Applicant: Nitin Kumar ,  Markus Ziegler ,  Robert Martin ,  Shashank Bakre

Inventor： Nitin Kumar ,  Markus Ziegler ,  Robert Martin ,  Shashank Bakre

IPC: H05B37/02

CPC classification number: H05B41/2883 ,  H05B41/36

Abstract: A ballast for energizing a lamp at a lighting level selected from a plurality of lamp lighting levels. The ballast includes a buck converter circuit configured to receive a DC voltage signal having a substantially constant magnitude. The buck converter circuit has a duty cycle for generating a lamp voltage output signal from the DC voltage signal. The lamp voltage output signal has a magnitude that is varied by the duty cycle to energize the lamp at the plurality of lamp lighting levels. A controller is configured to receive a dim input signal indicative of the selected lamp lighting level and to provide a control signal to the buck converter circuit as a function of the dim input signal. The control signal indicates a particular duty cycle corresponding to a lamp voltage output signal having a magnitude for energizing the lamp at the selected lamp lighting level.

Abstract translation: 一种镇流器，用于在从多个灯照明水平中选择的照明水平上激发灯。 镇流器包括被配置为接收具有基本恒定幅度的DC电压信号的降压转换器电路。 降压转换器电路具有用于从直流电压信号产生灯电压输出信号的占空比。 灯电压输出信号具有由占空比变化的大小，以在多个灯照明电平下给灯供电。 控制器被配置为接收指示所选择的灯点亮电平的暗淡输入信号，并且作为所述暗淡输入信号的函数向所述降压转换器电路提供控制信号。 控制信号表示对应于灯电压输出信号的特定占空比，该灯电压输出信号具有在选定的灯照明电平下对灯进行激励的幅度。

公开(公告)号：US08806058B1

公开(公告)日：2014-08-12

申请号：US13194571

申请日：2011-07-29

Applicant: Scott Mackie ,  James Washburn ,  Nitin Kumar ,  Sandeep Bajaj

Inventor： Scott Mackie ,  James Washburn ,  Nitin Kumar ,  Sandeep Bajaj

IPC: G06F15/17 ,  H04L12/56 ,  H04L29/06 ,  H04L29/08

CPC classification number: H04L45/44 ,  H04L29/06 ,  H04L29/08072 ,  H04L45/00 ,  H04L45/56 ,  H04L45/60

Abstract: In general, this disclosure describes a high-level forwarding path description language (FPDL) for describing internal forwarding paths within a network device. The FPDL enables developers to create a template that describes a section of an internal forwarding path within the forwarding plane of a network device. The FPDL provides syntactical elements for specifying the allocation of forwarding path structures as well as enabling the run-time construction of internal forwarding paths to interconnect the forwarding path structures in a manner specific to packet, packet flow, and/or interface properties, for example. In conjunction with late binding techniques, whereby the control plane of the network device provides arguments to template parameters that drive allocation by the packet forwarding engines of forwarding path structures specified by the FPDL, the techniques provide control plane processes a unified interface with which to manage the operation of the packet forwarding engines.

Abstract translation: 通常，本公开描述了用于描述网络设备内的内部转发路径的高级转发路径描述语言（FPDL）。 FPDL使开发人员能够创建一个描述网络设备转发平面内部转发路径部分的模板。 FPDL提供用于指定转发路径结构的分配的语法元素，以及启用内部转发路径的运行时构造以特定于分组，分组流和/或接口属性的方式互连转发路径结构，例如 。 结合后期绑定技术，由此网络设备的控制平面为模型参数提供参数，以驱动分组转发引擎对由FPDL指定的转发路径结构的分配，这些技术为控制平面处理提供统一的接口，用于管理 分组转发引擎的操作。

公开(公告)号：US08674617B2

公开(公告)日：2014-03-18

申请号：US13077063

申请日：2011-03-31

Applicant: Nitin Kumar ,  Shashank Bakre

Inventor： Nitin Kumar ,  Shashank Bakre

IPC: H05B37/02

CPC classification number: H05B41/40 ,  H05B41/42

Abstract: A lighting system converter circuit of a lamp power converter to selectively operate a plurality of lamps connected thereto is provided. The lighting system converter circuit includes a first impedance circuit and a second impedance circuit. Each impedance circuit includes an input terminal, an impedance component, and a switching network. The impedance components are each configured to connect in series with the lamps. Each input terminal is configured to receive a control signal that indicates a state of a switch. Each control signal has a first logic level, indicating the switch is non-conductive, and a second logic level, indicating the switch is conductive. Each switching network is connected to its respective input terminal and in parallel with its respective impedance component, and is configured to selectively operate between a conductive state and a non-conductive state, as a function of the logic level of its respective control signal.

Abstract translation: 提供了一种用于选择性地操作连接到其上的多个灯的灯功率转换器的照明系统转换器电路。 照明系统转换器电路包括第一阻抗电路和第二阻抗电路。 每个阻抗电路包括输入端子，阻抗部件和开关网络。 阻抗元件各自被配置为与灯串联。 每个输入端被配置为接收指示开关状态的控制信号。 每个控制信号具有第一逻辑电平，指示开关不导通，并且指示开关是导通的第二逻辑电平。 每个开关网络连接到其相应的输入端并且与其相应的阻抗分量并联，并且被配置为根据其各自的控制信号的逻辑电平的选择性地在导通状态和非导通状态之间操作。

公开(公告)号：US08574949B2

公开(公告)日：2013-11-05

申请号：US12886533

申请日：2010-09-20

Applicant: Jian Li ,  Minh Anh Nguyen ,  Nikhil Kalyankar ,  Nitin Kumar ,  Craig Hunter

Inventor： Jian Li ,  Minh Anh Nguyen ,  Nikhil Kalyankar ,  Nitin Kumar ,  Craig Hunter

IPC: H01L21/00

CPC classification number: H01L31/0516 ,  H01L21/228 ,  H01L31/02363 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/1804 ,  H02S50/10 ,  Y02B10/10 ,  Y02E10/547 ,  Y02P70/521

Abstract: Embodiments of the current invention describe methods of forming different types of crystalline silicon based solar cells that can be combinatorially varied and evaluated. Examples of these different types of solar cells include front and back contact silicon based solar cells, all-back contact solar cells and selective emitter solar cells. These methodologies all incorporate the formation of site-isolated regions using a combinatorial processing tool and the use of these site-isolated regions to form the solar cell area. Therefore, multiple solar cells may be rapidly formed on a single crystalline silicon substrate for use in combinatorial methodologies. Any of the individual processes of the methods described may be varied combinatorially to test varied process conditions or materials.

公开(公告)号：US20130111587A1

公开(公告)日：2013-05-02

申请号：US13283353

申请日：2011-10-27

Applicant: Nitin Kumar Goel ,  Kenneth D. Johnson ,  Matthew Ryan Miller ,  Navin Narayan Pai ,  Grzegorz M. Wroblewski ,  Gregory Justice Riggs

Inventor： Nitin Kumar Goel ,  Kenneth D. Johnson ,  Matthew Ryan Miller ,  Navin Narayan Pai ,  Grzegorz M. Wroblewski ,  Gregory Justice Riggs

IPC: G06F21/00

CPC classification number: G06F21/577 ,  G06F2221/034

Abstract: The subject disclosure is directed towards detecting software vulnerabilities in an isolated computing environment. In order to evaluate each input submission from an external computer, a plurality of tasks are automatically generated for execution on one or more computing units running within the isolated computing environment. Various configurations of the one or more computing units are defined in which each computing unit executes the plurality of tasks. A report is produced comprising results associated with such an execution.

Abstract translation: 主题公开旨在检测孤立计算环境中的软件漏洞。 为了评估来自外部计算机的每个输入提交，自动生成多个任务用于在孤立计算环境内运行的一个或多个计算单元上执行。 定义一个或多个计算单元的各种配置，其中每个计算单元执行多个任务。 制作了包含与此类执行相关联的结果的报告。