Riding Type Grass Mower having a Rear-Discharge Type Mower Unit
    131.
    发明申请
    Riding Type Grass Mower having a Rear-Discharge Type Mower Unit 有权
    具有后排放式割草机的骑马式割草机

    公开(公告)号:US20110131942A1

    公开(公告)日:2011-06-09

    申请号:US12871992

    申请日:2010-08-31

    IPC分类号: A01D34/125

    CPC分类号: A01D34/71 A01D57/26

    摘要: A riding type grass mower includes a right wheel and a left wheel, a rear-discharge type mower unit disposed forwardly of the right/left wheels, a driver's seat disposed between and upwardly of the right/left wheels, an engine mounted rearwardly of the driver's seat, an engine hood for covering the engine, and a restricting unit disposed rearwardly of the driver's seat and at an area downwardly of the engine hood, the restricting unit having a restricting face (including a mesh face) configured to restrict upward rising of cut grass discharged from the mower unit.

    摘要翻译: 一种骑马式割草机包括右轮和左轮,设置在左/右车轮前方的后排放式割草机单元,设置在左/右车轮之间和之上的驾驶员座椅,安装在左/右车轮后方的发动机 驾驶员座椅,用于覆盖发动机的发动机罩,以及设置在驾驶员座椅后方和发动机罩下方的区域的限制单元,限制单元具有限制面(包括网眼面),其限制向上升高 割草机从割草机排出。

    Resistance-change memory
    132.
    发明授权
    Resistance-change memory 有权
    电阻变化记忆

    公开(公告)号:US07952916B2

    公开(公告)日:2011-05-31

    申请号:US12366396

    申请日:2009-02-05

    IPC分类号: G11C11/00

    摘要: A resistance-change memory includes first and second bit lines running in the same direction, a third bit line running parallel to the first and second bit lines, fourth and fifth bit lines running in the same direction, a sixth bit line running parallel to the fourth and fifth bit lines, a first memory element which has one and the other terminals connected to the first and third bit lines, and changes to one of first and second resistance states, a first reference element having one and the other terminals connected to the fourth and sixth bit lines, and set in the first resistance state, a second reference element having one and the other terminals connected to the fifth and sixth bit lines, and set in the second resistance state, and a sense amplifier having first and second input terminals connected to the first and fourth bit lines.

    摘要翻译: 电阻变化存储器包括沿相同方向运行的第一和第二位线,与第一和第二位线并行运行的第三位线,沿相同方向运行的第四和第五位线,平行于第一位线的第六位线 第四和第五位线,第一存储器元件,其具有连接到第一和第三位线的一个端子和另一个端子,并且改变为第一和第二电阻状态中的一个;第一参考元件,其中一个和另一个端子连接到 第四和第六位线,并且设置在第一电阻状态,第二参考元件,其中一个和另一个端子连接到第五和第六位线,并被设置在第二电阻状态,以及读出放大器,具有第一和第二输入 连接到第一和第四位线的端子。

    MAGNETIC MEMORY
    134.
    发明申请
    MAGNETIC MEMORY 有权
    磁记忆

    公开(公告)号:US20110063900A1

    公开(公告)日:2011-03-17

    申请号:US12885175

    申请日:2010-09-17

    IPC分类号: G11C11/00

    CPC分类号: G11C11/1675 G11C11/1673

    摘要: According to one embodiment, a magnetic memory includes a magnetoresistive element includes a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is variable and a nonmagnetic layer disposed between the fixed layer and the recording layer. A direction of a read current is set to a first direction in a case where an expression of MR ratio ≧|Ic+/Ic−|−1 is satisfied if a critical current of the first direction used to write the magnetoresistive element to the parallel state is set to Ic− and a critical current of a second direction used to write the magnetoresistive element to the anti-parallel state is set to Ic+.

    摘要翻译: 根据一个实施例,磁存储器包括磁阻元件,其包括其磁化方向固定的固定层,其磁化方向可变的记录层和设置在固定层和记录层之间的非磁性层。 如果用于将磁阻元件写入平行状态的第一方向的临界电流满足MR比≧| Ic + / Ic- | -1的表达式的情况下,读取电流的方向被设定为第一方向 被设定为Ic-,将用于将磁阻元件写入反并联状态的第二方向的临界电流设定为Ic +。

    Speed-change transmission apparatus
    135.
    发明授权
    Speed-change transmission apparatus 有权
    变速传动装置

    公开(公告)号:US07887449B2

    公开(公告)日:2011-02-15

    申请号:US11661846

    申请日:2006-09-25

    IPC分类号: F16H47/04

    摘要: A speed-change transmission apparatus for effecting a speed-changing on an engine drive force with utilizing a continuously variable speed-change device, a plurality of planetary transmission mechanisms and a plurality of clutches is constructed to be capable of effecting the speed-changing operation smoothly, regardless of a centrifugal force generated in the clutches. An output from the continuously variable speed-change device and a drive force from the engine are combined by a planetary transmission section. The drive force from this planetary transmission section is transmitted via a clutch section to an output shaft. First, second, third and fourth clutches of the clutch section are configured to be switched over respectively between an engaged condition and a disengaged condition, as clutch members are engaged with or disengaged from output side rotational members.

    摘要翻译: 利用无级变速装置,多个行星传动机构和多个离合器来实现对发动机驱动力的变速的变速传动装置被构造成能够实现变速操作 无论在离合器中产生的离心力如何,都是平稳的。 来自无级变速装置的输出和来自发动机的驱动力由行星传动部组合。 来自该行星传动部的驱动力通过离合器部传递到输出轴。 离合器部分的第一,第二,第三和第四离合器被构造成在接合状态和分离状态之间分别切换,因为离合器部件与输出侧旋转部件接合或脱离。

    SEMICONDUCTOR MEMORY DEVICE
    136.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号:US20090257274A1

    公开(公告)日:2009-10-15

    申请号:US12400262

    申请日:2009-03-09

    IPC分类号: G11C11/16 G11C11/14

    摘要: A semiconductor memory device includes n resistance change elements which are arranged in one cell, have a low-resistance state and a high resistance state, are connected in series or parallel, have different resistance values in the same resistance state, and change between the low-resistance state and the high-resistance state under different conditions, and a write circuit which is connected to one end of the n resistance change elements, and applies a pulse current m (1≦m≦n) times to the n resistance change elements during a write operation. Letting Im be a current value of an mth pulse current, condition I1>I2> . . . >Im holds.

    摘要翻译: 半导体存储器件包括在一个单元中布置的具有低电阻状态和高电阻状态的n个电阻变化元件串联或并联连接,在相同电阻状态下具有不同的电阻值,并且在低电平 电阻状态和不同条件下的高电阻状态,以及与n个电阻变化元件的一端连接的写入电路,并向n个电阻施加脉冲电流m(1 <= m <= n)次 在写入操作期间更改元素。 令Im为第m个脉冲电流的当前值,条件I1> I2>。 。 。 > Im持有。

    MAGNETIC RANDOM ACCESS MEMORY AND WRITE METHOD OF THE SAME
    137.
    发明申请
    MAGNETIC RANDOM ACCESS MEMORY AND WRITE METHOD OF THE SAME 审中-公开
    磁性随机存取存储器及其写入方法

    公开(公告)号:US20080310215A1

    公开(公告)日:2008-12-18

    申请号:US12138017

    申请日:2008-06-12

    申请人: Yoshihiro Ueda

    发明人: Yoshihiro Ueda

    IPC分类号: G11C11/00 G11C7/00

    CPC分类号: G11C11/16

    摘要: A magnetic random access memory includes a memory unit including a memory cell array having a first memory cell for writing first information and a second memory cell for writing second information, and a controller connected to the memory unit, and configured to start supplying a write current in a first direction for writing the first information to the first memory cell and the second memory cell before a write data signal is determined, and, after the write data signal is determined, keep supplying the write current in the first direction to the first memory cell and supply the write current changed in a second direction for writing the second information to the second memory cell alone.

    摘要翻译: 磁性随机存取存储器包括存储单元,存储单元包括具有用于写第一信息的第一存储单元和用于写入第二信息的第二存储单元的存储单元阵列,以及连接到存储单元的控制器,并被配置为开始提供写入电流 在确定写入数据信号之前,将第一信息写入第一存储单元和第二存储单元的第一方向,并且在写数据信号被确定之后,将第一方向的写入电流保持在第一存储器 并且提供在第二方向上改变的写入电流,以将第二信息单独写入第二存储器单元。

    MAGNETIC MEMORY DEVICE
    138.
    发明申请
    MAGNETIC MEMORY DEVICE 有权
    磁记忆装置

    公开(公告)号:US20080112216A1

    公开(公告)日:2008-05-15

    申请号:US11937058

    申请日:2007-11-08

    申请人: Yoshihiro Ueda

    发明人: Yoshihiro Ueda

    IPC分类号: G11C11/00

    CPC分类号: G11C11/16

    摘要: There is provided a magnetic memory device including a first magnetoresistive element which takes a high-resistance-state when receiving a write current in a first direction, takes a low-resistance-state having a resistance value lower than that in the high-resistance-state when receiving a write current in a second direction opposite to the first direction, and receives a read current in a read operation, a second magnetoresistive element which takes one of the high-resistance and low-resistance-states in accordance with a magnetization state thereof, is fixed to the low-resistance-state when a direction of the read current is the same as the first direction, and is fixed to the high-resistance-state when the direction of the read current is the same as the second direction, and a control circuit which is connected to the first and second elements, and makes a read voltage applied to the first element equal to that applied to the second element.

    摘要翻译: 提供一种包括第一磁阻元件的磁存储器件,该第一磁阻元件在接收第一方向的写入电流时呈现高电阻状态,采用电阻值低于高电阻状态的电阻值的低电阻状态, 在与第一方向相反的第二方向上接收写入电流并且在读取操作中接收读取电流的状态,根据磁化状态采用高电阻和低电阻状态之一的第二磁阻元件 当读取电流的方向与第一方向相同时,固定为低电阻状态,并且当读取电流的方向与第二方向相同时被固定为高电阻状态 以及连接到第一和第二元件的控制电路,并且使施加到第一元件的读取电压等于施加到第二元件的读取电压。

    Nonvolatile memory device with variable resistance element
    139.
    发明授权
    Nonvolatile memory device with variable resistance element 失效
    具有可变电阻元件的非易失性存储器件

    公开(公告)号:US07142447B2

    公开(公告)日:2006-11-28

    申请号:US11133383

    申请日:2005-05-20

    IPC分类号: G11C11/00

    CPC分类号: G11C11/16

    摘要: A magnetic memory device includes a plurality of variable resistance elements arranged in parallel between a first and second nodes and having resistance values which vary depending on data stored in the elements, a selection transistor connected to the first node to perform selection on the plurality of variable resistance elements, and a bit line connected to the second node. A plurality of current paths including the variable resistance elements between the first and second nodes have different resistance values.

    摘要翻译: 一种磁存储器件包括多个可变电阻元件,它们并联布置在第一和第二节点之间,并具有根据存储在元件中的数据而变化的电阻值;连接到第一节点的选择晶体管,以对多个变量进行选择 电阻元件和连接到第二节点的位线。 包括第一和第二节点之间的可变电阻元件的多个电流路径具有不同的电阻值。

    Header-estimating moving picture receiving apparatus and output apparatus

    公开(公告)号:US20060088108A1

    公开(公告)日:2006-04-27

    申请号:US11299759

    申请日:2005-12-13

    CPC分类号: H04N19/89 H04N7/52 H04N7/56

    摘要: A receiving apparatus receives a bitstream that is divided into units encoding a moving picture and includes a stream header indicating how the units are to be decoded. The receiving apparatus estimates the contents of the stream header from the contents of the units, so that decoding of the units can begin before the stream header is received. The receiving apparatus preferably checks for errors in the analysis and decoding of the units, and modifies the estimated stream-header information when an error is discovered. The same unit may be analyzed and decoded repeatedly to hasten the correct estimation of the stream-header information.